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Semiconductor device and method for manufacturing the same
A semiconductor device includes a semiconductor substrate that includes an IGBT region. A first lifetime control layer extending along a planar direction of the...
Power semiconductor device
A power semiconductor device includes a semiconductor substrate layer of a first conductive type which has a lower part semiconductor layer of a second...
Tunnel field effect transistors
Tunnel field effect devices and methods of fabricating tunnel field effect devices are described. In one embodiment, the semiconductor device includes a first...
Structure and formation method of semiconductor device structure
Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a source structure in a...
Well controlled conductive dot size in flash memory
Some embodiments of the present disclosure relate to a method for forming flash memory. In this method, a first tunnel oxide is formed over a semiconductor...
Methods of manufacturing semiconductor devices
In a method of manufacturing a semiconductor device, a plasma annealing and supplying a threshold voltage control gas onto a portion of a substrate is performed...
Method of manufacturing semiconductor device using plasma doping process
and semiconductor device manufactured...
A method of manufacturing a semiconductor device includes forming a preliminary fin-type active pattern extending in a first direction, forming a device...
Method for manufacturing finFET
A method of manufacturing a FinFET device is provided, comprising: a. providing a substrate (100); b. forming a fin (200) on the substrate; c. forming an...
Method of forming a silicon-carbide device with a shielded gate
A silicon-carbide semiconductor substrate having a plurality of first doped regions being laterally spaced apart from one another and beneath a main surface,...
Termination design for high voltage device
The present disclosure describes a termination structure for a high voltage semiconductor transistor device. The termination structure is composed of at least...
Method of making a strained structure of a semiconductor device
A method of fabricating a field effect transistor (FET) includes forming a channel portion over a first surface of a substrate, wherein the channel portion...
Gate spacers and methods of forming
Methods and structures for forming devices, such as transistors, are discussed. A method embodiment includes forming a gate spacer along a sidewall of a gate...
Method of fabricating semiconductor MOS device
A method of fabricating a MOS device is disclosed. A substrate having an active area (AA) silicon portion and shallow trench isolation (STI) region surrounding...
Protection of semiconductor-oxide-containing gate dielectric during
replacement gate formation
Semiconductor-oxide-containing gate dielectrics can be formed on surfaces of semiconductor fins prior to formation of a disposable gate structure. A high...
Metal gate and manufuacturing process thereof
Some embodiments of the present disclosure provide a semiconductor device including a semiconductive substrate, a metal gate including a metallic layer proximal...
Methods of forming fins with different fin heights
One illustrative method disclosed herein includes, among other things, forming first and second fins, forming a liner layer above at least a first upper surface...
Back-end transistors with highly doped low-temperature contacts
A back end of line device and method for fabricating a transistor device include a substrate having an insulating layer formed thereon and a channel layer...
High electron mobility transistors with field plate electrode
A high electron mobility transistor comprising: an epitaxial substrate comprising a semi-insulating substrate, a buffer layer and a barrier layer sequentially...
Bipolar transistor, band-gap reference circuit and virtual ground
reference circuit and methods of fabricating...
The present invention provides a bipolar transistor, a method for forming the bipolar transistor, a method for turning on the bipolar transistor, and a band-gap...
Dual metal gate electrode for reducing threshold voltage
A gate conductor material stack including, from bottom to top, of a first metallic nitride, a second metallic nitride, and a conductive material portion is...
Asymmetric high-K dielectric for reducing gate induced drain leakage
An asymmetric high-k dielectric for reduced gate induced drain leakage in high-k MOSFETs and methods of manufacture are disclosed. The method includes...
Piezoresistive resonator with multi-gate transistor
An embodiment includes a first nonplanar transistor including a first fin that includes first source and drain nodes, and a first channel between the first...
Non-volatile memory device and method of fabricating the same
A non-volatile memory device may include a control plug formed over a substrate. A floating gate may be formed over the substrate, the floating gate surrounding...
Devices, systems, and methods related to removing parasitic conduction in
Semiconductor devices and methods for making semiconductor devices are disclosed herein. A method configured in accordance with a particular embodiment includes...
Semiconductor device contacts
Techniques are disclosed for forming contacts in silicon semiconductor devices. In some embodiments, a transition layer forms a non-reactive interface with the...
Semiconductor component comprising at least one contact structure for
feeding in and/or leading away charge...
A semiconductor component having at least one first contact structure for feeding in and/or leading away charge carriers in relation to the semiconductor...
Semiconductor device having a minimized region of sheild electrode and
gate electrode overlap
The present disclosure relates to a semiconductor device. Such a semiconductor device includes a trench metal-oxide-semiconductor (MOS) transistor having two or...
Semiconductor device with varied electrodes
A semiconductor device comprises an element region and a terminal region that surrounds the element region. The semiconductor device includes a first...
Zener diode having an adjustable breakdown voltage
The present disclosure relates to a Zener diode including a Zener diode junction formed in a semiconductor substrate along a plane parallel to the surface of...
Method for fabricating semiconductor device having dual work function gate
A semiconductor device includes a body including a first junction region; a pillar positioned over the body, and including a vertical channel region and a...
Spacer structures of a semiconductor device
A method of fabricating a semiconductor device includes forming a first set of gate electrodes over a substrate, adjacent gate electrodes of the first set of...
Semiconductor laminate, semiconductor device, and production method
Provided is a method for manufacturing a semiconductor device. Also provided are: a semiconductor device which can be obtained by the method; and a dispersion...
Semiconductor device structure and method for forming the same
A semiconductor device structure is provided. The semiconductor device structure includes a substrate. The semiconductor device structure includes a...
Heterostructure field-effect transistor
Heterostructure field-effect transistor (HFET) having a channel layer, a barrier layer disposed on the channel layer, and a gate, source and drain electrodes...
Integration of semiconductor epilayers on non-native substrates
An article includes a support substrate bonded to heterostructure epitaxial layers that include one or more electronic devices. The support substrate has a...
A semiconductor device includes a semiconductor layer having a first surface and a second surface, a first electrode on the first surface, a second electrode on...
Silicon carbide power bipolar devices with deep acceptor doping
In a general aspect, a power semiconductor device can include a collector region disposed on a substrate, the collector region can include n-type silicon...
Semiconductor device with first and second electrodes forming schottky
junction with silicon carbide...
A semiconductor device includes first and second second-conductivity-type region groups containing multiple second-conductivity-type regions that are disposed...
Semiconductor device and method for fabricating the same
A semiconductor device includes a buffer layer on a semiconductor substrate including first and second regions, a first channel layer on the buffer layer of the...
Semiconductor structure with multilayer III-V heterostructures
The source/drain of a fully III-V semiconductor or Si-based transistor includes a bottom barrier layer that may be lattice matched to the channel, a lower layer...
Method for fabricating a transistor device with a tuned dopant profile
A transistor device with a tuned dopant profile is fabricated by implanting one or more dopant migrating mitigating material such as carbon. The process...
FinFET conformal junction and high epi surface dopant concentration method
A method of forming a source/drain region with an abrupt, vertical and conformal junction and the resulting device are disclosed. Embodiments include forming a...
Transistor structure with reduced parasitic side wall characteristics
A MOS transistor structure for matched operation in weak-inversion or sub-threshold range (e.g. input-pair of operational amplifier, comparator, and/or...
Structure and method to minimize junction capacitance in nano sheets
A method of making a semiconductor device includes forming a nanosheet stack including a first layer and a second layer; patterning a gate stack on the...
Nanocrystals with high extinction coefficients and methods of making and
using such nanocrystals
A population of bright and stable nanocrystals is provided. The nanocrystals include a semiconductor core and a thick semiconductor shell and can exhibit high...
FinFET isolation structure and method for fabricating the same
A semiconductor device includes a semiconductor device and a semiconductor fin on the semiconductor substrate, in which the semiconductor fin has a fin...
Isolated through silicon vias in RF technologies
Disclosed are a structure for providing electrical isolation in a semiconductor substrate and an associated method for the structure's fabrication. The...
Methods, apparatuses and devices related to the manufacturing of compensation devices are provided. In some cases, an n/p-codoped layer is deposited for...
Trench gate trench field plate vertical MOSFET
A semiconductor device having a vertical drain extended MOS transistor may be formed by forming deep trench structures to define vertical drift regions of the...
A groove for air ventilation is formed in a rib with a substantially rectangular ring shape which is provided so as to surround a concave portion provided in a...