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Patent # Description
US-9,575,925 Rack server system and auto-addressing method thereof
A rack server system and an auto-addressing method thereof are disclosed. The rack server system comprises a plurality of backplanes and a rack management...
US-9,575,924 Apparatus and method for controlling external device
Provided is a terminal for controlling an external device, not equipped with its own memory or controller, connected to the terminal. The portable terminal,...
US-9,575,923 Input/output interface
A method of operating an input/output interface includes selecting one of a plurality of output driver circuits according to a mode selection signal, and...
US-9,575,922 Apparatus, system, and method for improving equalization with a software equalization algorithm
A system and method consistent with the present disclosure includes determining a jitter tolerance of a particular lane of a communication link corresponding to...
US-9,575,921 Command rate configuration in data processing system
In one or more embodiments, one or more systems, devices, methods, and/or processes described can continually increase a command rate of an interconnect if one...
US-9,575,920 Method for transmitting a process map via a gateway device
Exemplary methods and systems are directed to transmitting a process map of a control or automation system via a gateway device. The gateway device includes at...
US-9,575,919 Information system capable of expanding drive and bus number allocation method of the information system
In a storage device applying PCIe to a back-end network connection, in order to be capable of allocating bus numbers and making a PCIe switch expanded...
US-9,575,918 Collaboration server
A collaboration server comprising: a switch fabric; and a plurality of processing modules, each processing module including a CPU core; wherein the plurality of...
US-9,575,917 Protocol for digital audio-video interface
Provided are methods and systems for selectively communicating data between a source device and one or more sink devices. The method includes generating a...
US-9,575,916 Apparatus and method for identifying performance bottlenecks in pipeline parallel processing environment
A system identifies a performance bottleneck status in a parallel data processing environment by examining data flow associated with the parallel data...
US-9,575,915 Data migration method and apparatus
The present invention provides a data migration method and apparatus, where the method includes: after a second control board is inserted into a second control...
US-9,575,914 Information processing apparatus and bus control method
An information processing apparatus includes: a plurality of memories; a plurality of buses each connected to each of the memories; an input/output device...
US-9,575,913 Techniques for addressing topology specific replicated bus units
A technique for handling cache-inhibited operations in a data processing system includes receiving, at a topology specific replicated bus unit, a ...
US-9,575,912 Service request interrupt router with shared arbitration unit
A service request interrupt router having Interrupt Control Units (ICUs); and an arbitration unit configured to be shared by the ICUs to arbitrate among Service...
US-9,575,911 Interrupt controller and a method of controlling processing of interrupt requests by a plurality of processing...
An interrupt controller for controlling processing of interrupt requests by a plurality of processing units. The processing units have at least two modes: an...
US-9,575,910 USB RAM device with buffer descriptor table and dynamically configurable endpoint allocation
A compound USB device has a controller and a N+1 component USB devices. Each component USB device C.sub.i is assigned E.sub.i endpoints, where ...
US-9,575,909 Recording apparatus
A recording apparatus includes a recording unit, a waveguide forming unit, a communication unit, and a memory controller. The recording unit is configured to...
US-9,575,908 System and method for unlocking additional functions of a module
A system for interfacing with a co-processor or input/output device is disclosed. According to one embodiment, the system performs a maze unlock sequence by...
US-9,575,907 Memory apparatuses, computer systems and methods for ordering memory responses
Memory apparatuses that may be used for receiving commands and ordering memory responses are provided. One such memory apparatus includes response logic that is...
US-9,575,906 Method and system for process working set isolation
Embodiments of systems and methods disclosed herein may isolate the working set of a process such that the data of the working set is inaccessible to other...
US-9,575,905 Storage controller cache synchronization method and apparatus
A storage controller is provided. The storage controller includes a memory storing an indication of a current owner, a previous owner, and a preferred owner for...
US-9,575,904 Memory data security
A memory module secures data stored on the memory module. A request for the data from a computer system is received by the memory module. A verification key...
US-9,575,903 Security perimeter
Embodiments of memory devices, computer systems, security apparatus, data handling systems, and the like, and associated methods facilitate security in a system...
US-9,575,902 Apparatus, system, and method for managing commands of solid-state storage using bank interleave
An apparatus, system, and method are disclosed for efficiently managing commands in a solid-state storage device that includes a solid-state storage arranged in...
US-9,575,901 Programmable address-based write-through cache control
This invention is a cache system with a memory attribute register having plural entries. Each entry stores a write-through or a write-back indication for a...
US-9,575,900 Digital signal processing data transfer
A technique for transferring data in a digital signal processing system is described. In one example, the digital signal processing system comprises a number of...
US-9,575,899 Synchronizing a translation lookaside buffer with page tables
The translation lookaside buffer (TLB) of a processor is kept in synchronization with a guest page table by use of an indicator referred to as a "T" bit. The T...
US-9,575,898 Implementing coherency with reflective memory
Techniques for updating data in a reflective memory region of a first memory device are described herein. In one example, a method for updating data in a...
US-9,575,897 Processor with efficient processing of recurring load instructions from nearby memory addresses
A method includes, in a processor, processing program code that includes memory-access instructions, wherein at least some of the memory-access instructions...
US-9,575,896 Fast, dynamic cache packing
A method for storing information may include determining whether a received data object fits inside a particular one of a plurality of free blocks in a memory...
US-9,575,895 Providing common caching agent for core and integrated input/output (IO) module
In one embodiment, the present invention includes a multicore processor having a plurality of cores, a shared cache memory, an integrated input/output (IIO)...
US-9,575,894 Application aware cache coherency
A distributed processing system includes a first site and a second site, each containing at least one device having cache storage, nonvolatile storage, where,...
US-9,575,893 Snoop filter for multi-processor system and related snoop filtering method
A snoop filter for a multi-processor system has a storage device and a control circuit. The control circuit manages at least a first-type entry and at least a...
US-9,575,892 Replaying memory transactions while resolving memory access faults
One embodiment of the present invention is a parallel processing unit (PPU) that includes one or more streaming multiprocessors (SMs) and implements a replay...
US-9,575,891 Sidecar SRAM for high granularity in floor plan aspect ratio
A system and method for floorplanning a memory. A computing system includes a processing unit which generates memory access requests and a memory. The size of...
US-9,575,890 Supporting atomic accumulation with an addressable accumulator
Atomically accumulating memory updates in a computer system configured with an accumulator that is memory mapped. The accumulator includes an accumulator memory...
US-9,575,889 Memory server
A memory server providing remote memory for servers independent from the memory server. The memory server includes memory modules and a page table. A memory...
US-9,575,888 Semiconductor system and operating method thereof
A semiconductor system includes a semiconductor memory device suitable for storing data, and a host suitable for controlling the semiconductor memory device in...
US-9,575,887 Memory device, information-processing device and information-processing method
A memory device according to an embodiment includes a non-volatile storage device, a volatile storage device that stores saved data which is saved in the...
US-9,575,886 Methods and apparatus for storing data to a solid state storage device based on data classification
Systems and methods for storing data to a non-volatile storage device are provided. A request to store data to the storage device at a given address...
US-9,575,885 Data storage apparatus for scrambled data and management method thereof
A data storage apparatus has a transmission interface, a nonvolatile memory and a controller. The controller records a non-completed flag. When the controller...
US-9,575,884 System and method for high performance and low cost flash translation layer
Aspects include systems and methods for increasing performance of a flash translation layer (FTL) of a flash memory device. A copy of FTL tables stored on a...
US-9,575,883 Control device, storage device, and storage control method
A control device includes: a management information generation unit configured to generate or update logical-physical block address management information with...
US-9,575,882 Non-volatile memory interface
Apparatuses, systems, methods, and computer program products are disclosed for a memory controller. An apparatus includes a volatile memory medium located on a...
US-9,575,881 Systems and methods for providing improved latency in a non-uniform memory architecture
Systems, methods, and computer programs are disclosed for allocating memory in a portable computing device having a non-uniform memory architecture. One...
US-9,575,880 Semiconductor memory device and memory system
A semiconductor memory device and a memory system are disclosed. The semiconductor memory device includes: a memory bank configured to include a first section...
US-9,575,879 Managing memory in a computer system
Methods, computer program products, and systems for managing memory in a computer system in which memory locations in use at any given time are represented as a...
US-9,575,878 Data-driven testing without data configuration
In software development, the provision of a testing tool which includes a method for defining a data source dynamically during an execution run, instead of...
US-9,575,877 Method and system for testing control software of a controlled system
A method for testing control software of a controlled system is disclosed. The method may involve providing control software code data for each of the one or...
US-9,575,876 Performance testing of software applications
Identifying performance issues in an application under test (AUT). The AUT executes on a system under test (SUT) in a test environment, and uses one or more...
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