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Patent # Description
US-9,583,484 Tipless transistors, short-tip transistors, and methods and circuits therefor
An integrated circuit can include a plurality of first transistors formed in a substrate and having gate lengths of less than one micron and at least one...
US-9,583,483 Source and drain stressors with recessed top surfaces
An integrated circuit structure includes a gate stack over a semiconductor substrate, and a silicon germanium region extending into the semiconductor substrate...
US-9,583,482 High voltage semiconductor devices and methods of making the devices
A multi-cell MOSFET device including a MOSFET cell with an integrated Schottky diode is provided. The MOSFET includes n-type source regions formed in p-type...
US-9,583,481 Semiconductor device comprising plurality of conductive portions disposed within wells and a nanowire coupled...
A semiconductor device is provided. The semiconductor device includes a first conductive portion on a first side of a first shallow trench isolation (STI)...
US-9,583,480 Integrated circuit with matching threshold voltages and method for making same
An integrated circuit having a substrate, a buffer layer formed over the substrate, a barrier layer formed over the buffer layer, and an isolation region that...
US-9,583,479 Semiconductor charge pump with imbedded capacitor
A charge pump for an integrated circuit includes a substrate, first and second transistors and a capacitor. The first transistor includes first source and first...
US-9,583,478 Lateral power MOSFET
A lateral power MOSFET structure is disclosed. In some embodiments, a semiconductor device comprises substantially concentric source, channel, and drain...
US-9,583,477 Stacked half-bridge package
According to an exemplary embodiment, a stacked half-bridge package includes a control transistor having a control drain for connection to a high voltage input,...
US-9,583,476 Microelectronic device packages, stacked microelectronic device packages, and methods for manufacturing...
A stackable microelectronic package includes a first microelectronic die attached to and electrically connecting with a first substrate. A second ...
US-9,583,475 Microelectronic package with stacked microelectronic units and method for manufacture thereof
A microelectronic package may include a first microelectronic unit including a semiconductor chip having first chip contacts, an encapsulant contacting an edge...
US-9,583,474 Package on packaging structure and methods of making same
A package on packaging structure provides for improved thermal conduction and mechanical strength by the introduction of a sold thermal coupler between the...
US-9,583,473 Complete system-on-chip (SOC) using monolithic three dimensional (3D) integrated circuit (IC) (3DIC) technology
Embodiments disclosed in the detailed description include a complete system-on-chip (SOC) solution using monolithic three dimensional (3D) integrated circuit...
US-9,583,472 Fan out system in package and method for forming the same
Packages and methods of formation are described. In an embodiment, a system in package (SiP) includes first and second redistribution layers (RDLs), stacked die...
US-9,583,471 Integrated circuit module having a first die with a power amplifier stacked with a second die and method of...
Disclosed is an integrated circuit module that includes a first die having a plurality of hot regions and at least one cool region when operating under normal...
US-9,583,470 Electronic device with solder pads including projections
An electronic device including a solder pad structure and methods of forming an electrical interconnection are shown. Solder pads including one or more...
US-9,583,469 Light-emitting device
This disclosure discloses a light-emitting device. The light-emitting device is configured to electrically connect to an external circuit and comprises: a first...
US-9,583,468 Light-emitting part and light-emitting apparatus, and production methods therefor
The present invention provides a light-emitting part and a light-emitting apparatus exhibiting high brightness per unit area, and simplified production methods...
US-9,583,467 Optoelectronic semiconductor component and method for producing said component
An optoelectronic semiconductor component and a method for making an optoelectronic semiconductor component are disclosed. In an embodiment the component...
US-9,583,466 Etch removal of current distribution layer for LED current confinement
A method and structure for forming an array of LED devices is disclosed. The LED devices in accordance with embodiments of the invention may include a confined...
US-9,583,465 Three dimensional integrated circuit structure and manufacturing method of the same
Three dimensional integrated circuit structures and manufacturing methods of the same are disclosed. The three dimensional integrated circuit structure includes...
US-9,583,464 Semiconductor packaging structure and method
A system and method for packaging semiconductor dies is provided. An embodiment comprises a first package with a first contact and a second contact. A...
US-9,583,463 Array resistor and semiconductor module
A semiconductor module includes: a module board, a plurality of chips mounted on the module board, and a plurality of array resistors mounted on the module...
US-9,583,462 Damascene re-distribution layer (RDL) in fan out split die application
A semiconductor device may include a first semiconductor die. A passivation layer supports the first semiconductor die. The passivation layer may include a...
US-9,583,461 Probing chips during package formation
A method includes bonding a first package component on a first surface of a second package component, and probing the first package component and the second...
US-9,583,460 Integrated device comprising stacked dies on redistribution layers
Some features pertain to an integrated device that includes a dielectric layer configured as a base for the integrated device, several redistribution metal...
US-9,583,459 Method for producing a printed circuit, printed circuit obtained by this method and electronic module...
The invention concerns a method for producing a printed circuit for a chip card module. This method involves producing two layers of electrically conductive...
US-9,583,458 Methods for bonding a hermetic module to an electrode array
A method for bonding a hermetic module to an electrode array including the steps of: providing the electrode array having a flexible substrate with a top...
US-9,583,456 Multiple bond via arrays of different wire heights on a same substrate
Apparatuses relating generally to a substrate are disclosed. In such an apparatus, first wire bond wires ("first wires") extend from a surface of the substrate....
US-9,583,455 Semiconductor device
Reliability of a semiconductor device is improved. A semiconductor device has a base material of insulating material having a through hole, a terminal formed on...
US-9,583,454 Semiconductor die package including low stress configuration
A semiconductor die package. The semiconductor die package comprises a semiconductor die and a molded clip structure comprising a clip structure and a first...
US-9,583,453 Semiconductor packaging containing sintering die-attach material
Sintering die-attach materials provide a lead-free solution for semiconductor packages with superior electrical, thermal and mechanical performance to prior art...
US-9,583,452 Systems and methods for high-speed, low-profile memory packages and pinout designs
Systems and methods are provided for stacked semiconductor memory packages. Each package can include an integrated circuit ("IC") package substrate capable of...
US-9,583,451 Conductive pillar shaped for solder confinement
Pillar-type connections and methods for fabricating a pillar-type connection. A conductive layer is formed on a bond pad. A second conductive layer is formed on...
US-9,583,450 Method for transferring light-emitting elements onto a package substrate
A method for transferring light-emitting elements onto a package substrate includes: providing a light-emitting unit including a supporting substrate and a...
US-9,583,449 Semiconductor package
A semiconductor package includes a dielectric layer, a plurality of traces, a plurality of electrical pads, a plurality of studs and at least a semiconductor...
US-9,583,448 Chip on film and display device having the same
A flexible chip on film includes a base insulating layer, a metal layer disposed on an upper surface of the base insulating layer and including a circuit...
US-9,583,447 EMI shielding method of semiconductor packages
Disclosed is an EMI shielding method of semiconductor packages, including a tape attaching step of attaching an edge of a tape to a lower side of a frame to...
US-9,583,446 Semiconductor device and method of forming a shielding layer between stacked semiconductor die
A semiconductor device has a first semiconductor die with a shielding layer formed over its back surface. The first semiconductor die is mounted to a carrier. A...
US-9,583,445 Metal electromagnetic interference (EMI) shielding coating along an edge of a ceramic substrate
An electrical component may be mounted on a substrate such as a ceramic substrate. Contacts may be formed on upper and lower surfaces of the substrate. The...
US-9,583,444 Method for applying magnetic shielding layer, method for manufacturing a die, die and system
A method for applying a magnetic shielding layer to a substrate is provided, wherein a first magnetic shielding layer is adhered to a first surface of the...
US-9,583,443 Method for displaying position of alignment mark, array substrate and manufacturing method thereof
A method for displaying a position of an alignment mark, an array substrate and a manufacturing method thereof are provided. The method for displaying the...
US-9,583,442 Interconnect structure including middle of line (MOL) metal layer local interconnect on etch stop layer
An interconnect structure includes an insulator stack on an upper surface of a semiconductor substrate. The insulator stack includes a first insulator layer...
US-9,583,441 Semiconductor device
A conductor provided in an interconnection layer is allowed to have a low resistance. An insulator film is provided over a substrate, and is comprised of...
US-9,583,440 Semiconductor devices including metal-silicon-nitride patterns
A semiconductor memory device can include a first conductive line crossing over a field isolation region and crossing over an active region of the device, where...
US-9,583,439 Memory device comprising memory strings penetrating through a stacking structure and electrically contacting...
A memory device and a method for fabricating the same are provided. The memory device includes a substrate, a ground layer disposed on the substrate, a stacking...
US-9,583,438 Interconnect structure with misaligned metal lines coupled using different interconnect layer
In some embodiments, an interconnect structure includes a first metal line, a second metal line and a first connection structure. The first metal line is formed...
US-9,583,437 Manufacturing method of a semiconductor device and method for creating a layout thereof
A method for manufacturing a semiconductor device of one embodiment of the present invention includes: forming an insulation layer to be processed over a...
US-9,583,436 Package apparatus and manufacturing method thereof
A package apparatus comprises a first conductive wiring layer, a first conductive pillar layer, a first conductive glue layer, an internal component, a second...
US-9,583,435 Forming fence conductors using spacer etched trenches
A spacer etching process produces ultra-narrow conductive lines in a plurality of semiconductor dice. Trenches are formed in a first dielectric then a...
US-9,583,434 Metal line structure and method
A device comprises a first rounded metal line in a metallization layer over a substrate, a second rounded metal line in the metallization layer, a first air gap...
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