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Patent # Description
US-9,583,382 Interconnection structure including air gap, semiconductor device including air gap, and method of...
A semiconductor device includes a first insulating layer, a second insulating layer formed on the first insulating layer, a plurality of interconnection lines...
US-9,583,381 Methods for forming semiconductor devices and semiconductor device structures
Methods of forming semiconductor devices and features in semiconductor device structures include conducting an anti-spacer process to remove portions of a first...
US-9,583,380 Anisotropic material damage process for etching low-K dielectric materials
In one example, a method includes forming a mask layer above or in a dielectric material. The dielectric material is exposed to photon radiation in an ambient...
US-9,583,379 Inverted trapezoidal recess for epitaxial growth
A semiconductor device having an epitaxial layer a method of manufacture thereof is provided. The semiconductor device has a substrate with a trench formed...
US-9,583,378 Formation of germanium-containing channel region by thermal condensation utilizing an oxygen permeable material
A structure including a first semiconductor material portion and a second semiconductor material portion is provided. An oxygen impermeable hard mask is then...
US-9,583,377 Installation fixture for elastomer bands
An installation fixture adapted to mount an elastomer band in a mounting groove around a semiconductor substrate support used for supporting a semiconductor...
US-9,583,376 Suction-holding apparatus and wafer polishing apparatus
A suction-holding apparatus includes a suction plate made of an air-permeable material, a holding member formed with a through-hole in which the suction plate...
US-9,583,375 Water soluble mask formation by dry film lamination
Methods and systems for forming water soluble masks by dry film lamination are described. Also described are methods of wafer dicing, including formation of a...
US-9,583,374 Debonding temporarily bonded semiconductor wafers
Described methods and apparatus provide a controlled perturbation to an adhesive bond between a device wafer and a carrier wafer. The controlled perturbation,...
US-9,583,373 Wafer carrier having cavity
A wafer carrier includes a base having a cavity provided at the center of the base and an outer sidewall extending along and away from an edge of the base to...
US-9,583,372 Structure for joining ceramic plate to metal cylindrical member
A member for semiconductor manufacturing device includes a susceptor which is a ceramic plate formed of AlN and a gas introduction pipe which is joined to the...
US-9,583,371 Electrostatic chuck and apparatus for processing a substrate including the same
An ESC may include a dielectric layer, an electrode, a pedestal, a heater, an adhesive and a protecting ring. The dielectric layer may be configured to support...
US-9,583,370 Article transport facility
An article transport facility includes a connecting actuator device for moving an eject portion of an inactive gas supplying device relative to a support...
US-9,583,369 Ion assisted deposition for rare-earth oxide based coatings on lids and nozzles
A method of manufacturing an article comprises providing a lid or nozzle for an etch reactor. Ion assisted deposition (IAD) is then performed to deposit a...
US-9,583,368 Flip chip package and manufacturing method thereof
A flip chip package and a manufacturing method thereof are disclosed. The flip chip package in accordance with an embodiment of the present invention includes:...
US-9,583,367 Methods and apparatus for bump-on-trace chip packaging
Methods and apparatuses for a attaching a first substrate to a second substrate are provided. In some embodiments, a first substrate has a protective layer,...
US-9,583,366 Thermally-enhanced provision of underfill to electronic devices using a stencil
A method of feeding underfill material to fill a space between a semiconductor die and a substrate onto which the semiconductor die has been bonded, the method...
US-9,583,365 Method of forming interconnects for three dimensional integrated circuit
A method of forming interconnects for three dimensional integrated circuits comprises attaching a metal layer on a first carrier, attaching a first side of a...
US-9,583,364 Processes and apparatus for preparing heterostructures with reduced strain by radial compression
Apparatus and processes for preparing heterostructures with reduced strain are disclosed. The heterostructures may include a semiconductor structure that...
US-9,583,363 Processes and apparatus for preparing heterostructures with reduced strain by radial distension
Apparatus and processes for preparing heterostructures with reduced strain are disclosed. The heterostructures may include a semiconductor structure that...
US-9,583,362 Metal gate structure and manufacturing method thereof
The present disclosure provides a semiconductor structure includes a semiconductor layer having a first surface, and an interlayer dielectric (ILD) defining a...
US-9,583,361 Method of processing target object and plasma processing apparatus
A method of processing a target object includes (a) exposing a resist mask to active species of hydrogen generated by exciting plasma of a hydrogen-containing...
US-9,583,360 Substrate processing apparatus and substrate processing method
In one embodiment, a substrate processing apparatus, includes: a chamber; a first electrode disposed in the chamber; a second electrode disposed in the chamber...
US-9,583,359 Polishing compositions and methods for selectively polishing silicon nitride over silicon oxide films
Stable aqueous polishing compositions that can selectively polish silicon nitride (SiN) films and nearly stop (or polish at very low rates) on silicon oxide...
US-9,583,358 Hardmask composition and method of forming pattern by using the hardmask composition
A hardmask composition may include a solvent and a 2-dimensional carbon nanostructure containing about 0.01 atom % to about 40 atom % of oxygen or a...
US-9,583,357 Systems and methods for reverse pulsing
Systems and methods for reverse pulsing are described. One of the methods includes receiving a digital signal having a first state and a second state. The...
US-9,583,356 Method for forming semiconductor device structure
A method for forming a semiconductor device structure is provided. The semiconductor device structure includes forming a film over a substrate. The...
US-9,583,355 Plasma processing apparatus and plasma processing method
The plasma processing apparatus is provided with a chamber 11, a plasma source 13 which generates plasma inside the chamber 11, a stage 16 which is provided...
US-9,583,354 Systems and methods for depositing materials on either side of a freestanding film using laser-assisted...
Embodiments of the present invention provide systems and methods for depositing materials on either side of a freestanding film using laser-assisted chemical...
US-9,583,353 Lateral electrochemical etching of III-nitride materials for microfabrication
Conductivity-selective lateral etching of III-nitride materials is described. Methods and structures for making vertical cavity surface emitting lasers with...
US-9,583,352 Method of etching and cleaning wafers
A method of operating a wafer processing system includes etching a batch of wafers. The method also includes transferring at least a portion of the batch of...
US-9,583,351 Inverted contact
An inverted contact and methods of fabrication are provided. A sacrificial layer is patterned in an inverted trapezoid shape, and oxide is deposited around the...
US-9,583,350 Memory device and method for fabricating the same
A memory device comprises a first conductive stripe, a first memory layer, a first conductive pillar, a first dielectric layer and a first conductive plug. The...
US-9,583,349 Lowering tungsten resistivity by replacing titanium nitride with titanium silicon nitride
Semiconductor devices, methods and apparatus for forming the same are provided. The semiconductor device includes a substrate having a source and drain region...
US-9,583,348 Silane and borane treatments for titanium carbide films
Methods of treating metal-containing thin films, such as films comprising titanium carbide, with a silane/borane agent are provided. In some embodiments a film...
US-9,583,347 Manufacturing method for semiconductor device using resist patterns and impurity injections
A manufacturing method for a semiconductor device, the method, comprising forming, on a substrate, a first resist pattern including a plurality of line patterns...
US-9,583,346 Method for manufacturing silicon carbide semiconductor device
A method for manufacturing a silicon carbide semiconductor device includes steps below. A silicon carbide substrate having a first main surface and a second...
US-9,583,345 Method for overcoming broken line and photoresist scum issues in tri-layer photoresist patterning
A method of fabricating a semiconductor device includes forming a first layer over a substrate and forming a second layer over the first layer. The method...
US-9,583,344 Photoresist pattern trimming methods
Provided are methods of trimming photoresist patterns. The methods involve coating a photoresist trimming composition over a photoresist pattern, wherein the...
US-9,583,343 Method of forming non-continuous line pattern and non-continuous line pattern structure
A method of forming a non-continuous line pattern includes forming a DSA material layer on a substrate, performing a phase separation of the DSA material layer...
US-9,583,342 FinFET doping methods and structures thereof
A method for fabricating a semiconductor device having a substantially undoped channel region includes providing a substrate having a fin extending from the...
US-9,583,341 Layer transferring process
A process for transferring a useful layer to a receiver substrate includes providing a donor substrate comprising an intermediate layer, a carrier substrate,...
US-9,583,340 Semipolar nitride semiconductor structure and method of manufacturing the same
Provided are a semipolar nitride semiconductor structure and a method of manufacturing the same. The semipolar nitride semiconductor structure includes a...
US-9,583,339 Method for forming spacers for a transistor gate
A method is provided for forming spacers for a gate of a field effect transistor, the gate being situated above a layer of semiconductor material, including...
US-9,583,338 Method of manufacturing semiconductor device, substrate processing apparatus, and recording medium
According to the present disclosure, a film containing a predetermined element, carbon and nitrogen is formed with high controllability of a composition...
US-9,583,337 Oxygen radical enhanced atomic-layer deposition using ozone plasma
A method of performing an oxygen radical enhanced atomic-layer deposition process on a surface of a substrate that resides within an interior of a reactor...
US-9,583,336 Process to enable ferroelectric layers on large area substrates
A microelectronic device with a ferroelectric layer is formed using an MOCVD tool. A substrate is disposed on a susceptor heated to 600.degree. C. to...
US-9,583,335 Method of forming dielectric films, new precursors and their use in semiconductor manufacturing
Method of deposition on a substrate of a dielectric film by introducing into a reaction chamber a vapor of a precursor selected from the group consisting of...
US-9,583,334 Gallium lanthanide oxide films
Electronic apparatus and methods of forming the electronic apparatus include a gallium lanthanide oxide film for use in a variety of electronic systems. The...
US-9,583,333 Low temperature silicon nitride films using remote plasma CVD technology
Embodiments of the present invention generally provide methods for forming a silicon nitride layer on a substrate. In one embodiment, a method of forming a...
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