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Patent # Description
US-9,583,232 Electrically conductive rubber composition, transfer roller, and image forming apparatus
An electrically conductive rubber composition which can be efficiently and sufficiently foamed and crosslinked by means of a continuous crosslinking apparatus...
US-9,583,231 Carbon nanotube composite electrode and method for manufacturing the same
Provided is a carbon nanotube composite electrode having carbon nanotubes which are firmly fixed to an electrode substrate so as to utilize the characteristics...
US-9,583,230 Electrically conductive polyethylene resin composition, electrically conductive polyethylene resin molding,...
The present invention provides an electrically conductive polyethylene resin composition having a stable volume resistance value and in addition, a low-friction...
US-9,583,229 X-ray laser microscopy system and method
Improved system and method of X-ray laser microscopy that combines information obtained from both X-ray diffraction and X-ray imaging methods. The sample is...
US-9,583,228 Scattered radiation grid of a CT detector
A scattered radiation grid of a CT detector is disclosed and includes a plurality of detector elements arranged in multiple cells in the phi direction and in...
US-9,583,227 Optical device for focusing synchrotron radiation light source
An optical device for focusing synchrotron radiation light source is disclosed according to the present invention, so as to improve the uniformity of the light...
US-9,583,226 Cooling duct assembly for control element drive mechanism
The cooling duct assembly for a control element drive mechanism (CEDM) includes a skirt that is combined on a circumference of a reactor head and has first air...
US-9,583,225 Laser irradiation apparatus and laser machining method
A laser irradiation apparatus which is provided with: an environment isolation container, which houses a laser oscillator and is disposed in water; a laser...
US-9,583,224 Passive safety system of integral reactor
A passive safety system includes a containment, a reactor in the containment, a plurality of safety injection tanks connected with the reactor and having water...
US-9,583,223 Nuclear reactor core loading and operation strategies
Cores include different types of control cells in different numbers and positions. A periphery of the core just inside the perimeter may have higher reactivity...
US-9,583,222 Debris filter for nuclear reactor installation and nuclear fuel assembly comprising such a debris filter
A debris filter for a nuclear reactor installation is provided. The debris filter comprises a plurality of plates arranged side-by-side in a spaced relationship...
US-9,583,221 Integrated emergency core cooling system condenser for pressurized water reactor
A pressurized water nuclear reactor (PWR) includes a pressure vessel having a lower portion containing a nuclear reactor core comprising a fissile material and...
US-9,583,220 Centralized variable rate serializer and deserializer for bad column management
A memory circuit includes an array subdivided into multiple divisions, each connectable to a corresponding set of access circuitry. A serializer/deserializer...
US-9,583,219 Method and apparatus for in-system repair of memory in burst refresh
In a repair of a random access memory (RAM), an error information is received, a fail address of the RAM identified, and a one-time programming applied to a...
US-9,583,218 Configurable register circuitry for error detection and recovery
Integrated circuits such as application specific integrated circuits or programmable logic devices may include sequential elements such as configurable register...
US-9,583,217 Decoding method, memory storage device and memory control circuit unit
A decoding method, a memory storage device and a memory control circuit unit are provided, the decoding method includes: reading a plurality of memory cells...
US-9,583,216 MBIST device for use with ECC-protected memories
A system implementing an MBIST device is disclosed. The system includes an ECC-protected memory and the MBIST device for self-test of the memory. The MBIST...
US-9,583,215 Semiconductor memory device and testing method thereof
A semiconductor memory device is provided which includes memory cells, a first error correction code (ECC) circuit configured to generate at least one selected...
US-9,583,214 Semiconductor circuit and leakage current test system
A semiconductor circuit includes a test control unit configured to generate a driving activation signal and a sensing activation signal in response to a command...
US-9,583,213 Positive/negative sampling and holding circuit
A positive/negative sampling and holding (S/H) circuit is disclosed herein. The positive/negative S/H circuit includes an operational amplifier, a first...
US-9,583,212 Domain wall injector device using fringing fields aided by spin transfer torque
A domain wall injector device uses electrical current passed across an interface between two magnetic regions whose magnetizations are aligned non-collinearly...
US-9,583,211 Incorporating bit write capability with column interleave write enable and column redundancy steering
A column access control circuit for generating column write enable outputs with redundancy steering control and bit write control for an integrated circuit...
US-9,583,210 Fuse-based integrity protection
Various systems and methods for implementing fuse-based integrity protection are described herein. A system for validating a read-only memory (ROM), the system...
US-9,583,209 High density memory architecture
Various implementations described herein are directed to an integrated circuit having high density memory architecture. The integrated circuit may include a...
US-9,583,208 Sensing scheme for high speed memory circuits with single ended sensing
A circuit detects values stored in bit cells of a memory circuit, for example, a memory circuit with single ended sensing. The circuit injects a charge into a...
US-9,583,207 Adaptive data shaping in nonvolatile memory
A nonvolatile memory block experiences multiple write-erase cycles during which data is subject to a shaping operation prior to storage. In response to a...
US-9,583,206 Data storage device having reflow awareness
A method includes, responsive to a power-up event at a data storage device that includes a memory, reading a flag stored at the data storage device and...
US-9,583,205 Background threshold voltage shifting using base and delta threshold voltage shift values in non-volatile memory
In one embodiment, a computer-implemented method includes determining, by a processor, after the writing of data to a non-volatile memory block, one or more...
US-9,583,204 NAND flash memory having multiple cell substrates
A NAND flash memory bank having a plurality of bitlines of a memory array connected to a page buffer, where NAND cell strings connected to the same bitline are...
US-9,583,203 Semiconductor memory device and operation method thereof
A semiconductor memory device includes a memory cell suitable for having a predetermined cell state based on a data stored therein, a control signal generation...
US-9,583,202 Read level grouping algorithms for increased flash performance
A plurality of flash memory wordlines of a flash storage device are divided into a plurality of wordline groups based on read error counts associated with the...
US-9,583,201 Storage device and operating method thereof
A storage device includes a main block including a plurality of sub-blocks, a peripheral circuit configured to perform a program operation, a read operation or...
US-9,583,200 Non-volatile semiconductor memory device and memory system in which write operation is resumed after being...
A non-volatile semiconductor memory device includes a memory cell array and a control circuit. A control circuit performs an erase operation providing a memory...
US-9,583,199 Mitigation of data retention drift by programming neighboring memory cells
A method includes, in a plurality of memory cells that share a common isolation layer and store in the common isolation layer quantities of electrical charge...
US-9,583,198 Word line-dependent and temperature-dependent pass voltage during programming
Techniques are provided for avoiding over-programming which can occur on memory cells connected to a data word line at a source-side of a block of word lines. A...
US-9,583,197 Nonvolatile memory device, program method thereof, and storage device including the same
A nonvolatile memory device includes memory cells stacked in a direction perpendicular to a substrate and further includes a first memory cell string connected...
US-9,583,196 Immediate feedback before or during programming
A system and method of programming user data into a memory cell includes receiving a first user data to be programmed in a memory controller, selecting a memory...
US-9,583,195 Systems, methods and devices for a memory having a buried select line
Memory cells and methods for programming and erasing a memory cell by utilizing a buried select line are described. A voltage potential may be generated between...
US-9,583,194 Memory system and operating method thereof
A memory system includes: a memory device comprising at least a page; and a controller suitable for setting a seed offset according to a size of a restricted...
US-9,583,193 Compact memory device of the EEPROM type with a vertical select transistor
Integrated non-volatile memory device includes an integrated memory cell of the EEPROM type with a floating-gate transistor and a selection transistor connected...
US-9,583,192 Matchline precharge architecture for self-reference matchline sensing
The present disclosure relates to content addressable memories (CAM), and more particularly, to a searchable CAM structure having self-reference matchline...
US-9,583,191 CAM design for bit string lookup
In one embodiment, a programming content addressable memory (CAM) comprising at least one match line, the at least one match line being preloaded to high, and...
US-9,583,190 Content addressable memory in integrated circuit
An integrated circuit (IC) that includes content addressable memories (CAM) is described. A CAM receives a key and searches through entries stored in the CAM...
US-9,583,189 Memory device, operating and control method thereof
A method of operating a memory device including a plurality of memory cells is provided. The method includes receiving a first write command, determining...
US-9,583,188 Semiconductor memory device including rewriting operation for improving the long-term reliability of the...
A semiconductor memory device has at least one memory cell using a resistance variable element, and a control circuit which controls writing to and reading from...
US-9,583,187 Multistage set procedure for phase change memory
Phase change material can be set with a multistage set process. Set control logic can heat a phase change semiconductor material (PM) to a first temperature for...
US-9,583,186 Non-volatile memory apparatus sensing current changing according to data stored in memory cell
A nonvolatile memory apparatus includes a sensing voltage generation unit, a memory cell, a current copy unit and a data sensing unit. The sensing voltage...
US-9,583,185 Phase change memory devices and systems having reduced voltage threshold drift and associated methods
Phase change memory devices, systems, and associated methods are provided and described. Such devices, systems, and methods manage and reduce voltage threshold...
US-9,583,184 Estimation of level-thresholds for memory cells
Methods and apparatus are provided for determining level-thresholds for q-level memory cells. A group of the memory cells are read to obtain respective read...
US-9,583,183 Reading resistive random access memory based on leakage current
A data storage device includes a resistive random access memory (ReRAM). The data storage device includes read circuitry coupled to a storage element of the...
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