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Patent # Description
US-9,590,076 Method for manufacturing a FinFET device
A method for manufacturing a FinFET device, including providing a substrate; implementing a source/drain doping on the substrate; etching the doped substrate to...
US-9,590,075 Semiconductor device
A semiconductor device includes a semiconductor layer of a first conductivity type and a semiconductor layer of a second conductivity type formed thereon. The...
US-9,590,074 Method to prevent lateral epitaxial growth in semiconductor devices
The method for preventing epitaxial growth in a semiconductor device begins with patterning a photoresist layer over a semiconductor structure having a set of...
US-9,590,073 Methods of fabricating semiconductor devices
Semiconductor devices and methods of fabricating semiconductor devices are provided. The methods may include forming an interlayer insulation layer on a...
US-9,590,072 Method of forming semiconductor device
The present invention provides a method of forming a semiconductor device including following steps. Firstly, a fin shaped structure is formed on a substrate,...
US-9,590,071 Manufacturing method of semiconductor device and semiconductor device
The characteristics of a semiconductor device using a nitride semiconductor are improved. A trench which penetrates an insulating film and a barrier layer and...
US-9,590,069 Self-aligned structures and methods for asymmetric GaN transistors and enhancement mode operation
Embodiments include high electron mobility transistors (HEMT). In embodiments, a gate electrode is spaced apart by different distances from a source and drain...
US-9,590,068 High-mobility multiple-gate transistor with improved on-to-off current ratio
A multi-gate transistor includes a semiconductor fin over a substrate. The semiconductor fin includes a central fin formed of a first semiconductor material;...
US-9,590,067 Silicon carbide semiconductor devices having nitrogen-doped interface
Methods, systems, and devices are disclosed for implementing high power circuits and semiconductor devices. In one aspect, a method for fabricating a silicon...
US-9,590,066 Transistors, memory cells and semiconductor constructions
Some embodiments include a semiconductor construction having a gate extending into a semiconductor base. Conductively-doped source and drain regions are within...
US-9,590,065 Semiconductor device with metal gate structure comprising work-function metal layer and work-fuction adjustment...
The present disclosure provides a semiconductor device with a profiled work-function metal gate electrode. The semiconductor structure includes a metal gate...
US-9,590,064 Process for producing a contact on an active zone of an integrated circuit, for example produced on an SOI...
An integrated circuit includes an active zone lying above a semiconductor substrate. A cavity borders the active zone and extends, in an insulating zone, as far...
US-9,590,063 Method and structure for a large-grain high-K dielectric
A method of forming a semiconductor device (100) includes depositing a metal oxide (104) over the substrate (102). The depositing includes combining a first...
US-9,590,062 Insulating block in a semiconductor trench
A semiconductor device is produced by: creating an opening in a mask formed on a semiconductor body; creating, underneath the opening, a trench in the...
US-9,590,061 Semiconductor device with voltage resistant structure
A semiconductor device of the present invention includes a semiconductor layer of a first conductivity type having a cell portion and an outer peripheral...
US-9,590,060 Enhancement-mode III-nitride devices
A III-N enhancement-mode transistor includes a III-N structure including a conductive channel, source and drain contacts, and a gate electrode between the...
US-9,590,059 Interdigitated capacitor to integrate with flash memory
Some embodiments relate to an integrated circuit (IC). The IC includes a semiconductor substrate including a flash memory region and a capacitor region. A flash...
US-9,590,058 Methods and structures for a split gate memory cell structure
A method of forming a split gate memory cell structure using a substrate includes forming a gate stack comprising a select gate and a dielectric portion...
US-9,590,057 Reduced parasitic capacitance with slotted contact
A FET device fabricated by providing a first conductor on a substrate, the first conductor having a first top surface with a first height above the substrate. A...
US-9,590,056 Semiconductor device comprising contact structures with protection layers formed on sidewalls of contact etch...
A semiconductor device includes a silicide contact region positioned at least partially in a semiconductor layer, an etch stop layer positioned above the...
US-9,590,055 Thin film transistor, method for manufacturing the same, array substrate, and display device
The present disclosure provides a thin film transistor and its manufacturing method, an array substrate, a display device. The thin film transistor includes a...
US-9,590,054 Low temperature spacer for advanced semiconductor devices
Embodiments of the present invention provide semiconductor structures and methods for making the same that include a boron nitride (BN) spacer on a gate stack,...
US-9,590,053 Methodology and structure for field plate design
The present disclosure relates to a high voltage transistor device having a field plate, and a method of formation. In some embodiments, the high voltage...
US-9,590,052 High-voltage transistor having shielding gate
A semiconductor device includes a plurality of high-voltage insulated-gate field-effect transistors arranged in a matrix form on the main surface of a...
US-9,590,051 Heterogeneous layer device
An embodiment includes an apparatus comprising: an N layer comprising an NMOS device having a N channel, source, and drain that are all intersected by a first...
US-9,590,050 Crystalline multilayer structure and semiconductor device
Provided is a crystalline multilayer structure having good semiconductor properties. In particular, the crystalline multilayer structure has good electrical...
US-9,590,049 Semiconductor composite film with heterojunction and manufacturing method thereof
The present invention discloses a semiconductor composite film with a heterojunction and a manufacturing method thereof. The semiconductor composite film...
US-9,590,048 Electronic device
In an embodiment, an electronic device includes a semiconductor layer having a surface, a gate and a first current electrode on the surface and a dielectric...
US-9,590,047 SiC bipolar junction transistor with reduced carrier lifetime in collector and a defect termination layer
A method of manufacturing a silicon carbide (SiC) bipolar junction transistor (BJT) and a SiC BJT (100) are provided. The SiC BJT comprises an emitter region...
US-9,590,046 Monocrystalline SiC substrate with a non-homogeneous lattice plane course
A method is used for producing an SiC volume monocrystal by sublimation growth. During growth, by sublimation of a powdery SiC source material and by transport...
US-9,590,045 Graphene base transistor and method for making the same
A graphene base transistor comprises on a semiconductor substrate surface an emitter pillar and an emitter-contact pillar, which extend from a pillar foundation...
US-9,590,044 Two-dimensional material containing electronic components
In various embodiments, an electronic component is provided. The electronic component may include a dielectric structure; and a two-dimensional material...
US-9,590,043 Semiconductor device and method of manufacturing the same
A semiconductor device includes a semiconductor substrate, and a P-well and an N-type drift region disposed in the semiconductor substrate. The P-well includes...
US-9,590,041 Semiconductor structure
A semiconductor structure includes a semiconductor substrate, a dielectric structure formed on the semiconductor substrate and including at least a recess...
US-9,590,040 Methods of forming fins for a FinFET device by forming and replacing sacrificial fin structures with...
One illustrative method disclosed herein includes, among other things, forming a sacrificial fin structure above a semiconductor substrate, forming a layer of...
US-9,590,039 Semiconductor structure and method for forming the same
A semiconductor structure and a method for forming same are provided. The semiconductor structure includes a bipolar transistor. The bipolar transistor includes...
US-9,590,038 Semiconductor device having nanowire channel
A semiconductor device is provided as follows. A fin-type pattern includes first and second oxide regions in an upper portion of the fin-type pattern. The...
US-9,590,037 p-FET with strained silicon-germanium channel
A method of forming a semiconductor structure includes forming a dummy gate above a semiconductor substrate. The dummy gate defines a source-drain region...
US-9,590,036 Contact window structure, pixel structure and method for manufacturing thereof
The present disclosure provides a contact window structure. In the contact window structure, a first insulating layer, having a first opening, is positioned on...
US-9,590,035 Three-dimensional semiconductor template for making high efficiency solar cells
A semiconductor template having a top surface aligned along a (100) crystallographic orientation plane and an inverted pyramidal cavity defined by a plurality...
US-9,590,034 Methods of forming semiconductor devices to include single body interconnection patterns using fine patterning...
A method of forming fine patterns for a semiconductor device includes providing a substrate with a first region and a second region, forming a conductive layer...
US-9,590,033 Trench separation diffusion for high voltage device
A manufacturable and economically viable edge termination structure allows a semiconductor device to withstand a very high reverse blocking voltage (for...
US-9,590,032 Fin-FET device and manufacturing method thereof
A fin-like field-effect transistor (Fin-FET) device includes a substrate, a fin structure disposed on the substrate, and an isolation structure disposed...
US-9,590,031 Fin-type field effect transistor and manufacturing method thereof
A fin-type field effect transistor includes a semiconductor body formed on a substrate, the semiconductor body having a top surface and a pair of laterally...
US-9,590,030 Semiconductor device having diode characteristic
According to one embodiment, a semiconductor device is provided. The semiconductor device has a first region formed of semiconductor and a second region formed...
US-9,590,029 Method for manufacturing insulated gate bipolar transistor
A method for manufacturing an insulated gate bipolar transistor (100) comprises: providing a substrate (10), forming a field oxide layer (20) on a front surface...
US-9,590,028 Method and device for an integrated trench capacitor
A methodology for forming trench capacitors on an interposer wafer by an integrated process that provides high-capacitance, ultra-low profile capacitor...
US-9,590,027 Method for fabricating an integrated-passives device with a MIM capacitor and a high-accuracy resistor on top
The present invention relates to a method for fabricating an electronic component, comprising fabricating, on a substrate (102) at least one integrated MIM...
US-9,590,026 High resistivity iron-based, thermally stable magnetic material for on-chip integrated inductors
An on-chip magnetic structure includes a palladium activated seed layer and a substantially amorphous magnetic material disposed onto the palladium activated...
US-9,590,025 Tiled OLED display and manufacturing method thereof
The present invention is applicable to the field of display technologies and provides a tiled OLED display, and the tiled OLED display includes an OLED front...
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