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Patent # Description
US-9,589,922 Electronic module and method of manufacturing the same
An electronic module is provided, which comprises a first carrier; an electronic chip comprising at least one electronic component and arranged on the first...
US-9,589,921 Semiconductor device
In one semiconductor device, a semiconductor chip has first and second pad electrodes disposed on the main surface thereof, insulating films that cover the main...
US-9,589,920 Chip package
An embedded die package and method of manufacture, the die package comprising a die having I/O contact pads in a passivation layer wherein the die contact pads...
US-9,589,919 Interconnect arrangement for hexagonal attachment configurations
The present description relates to the field of fabricating microelectronic devices, wherein a microelectronic device may have a hexagonal confirmation for...
US-9,589,918 Memory device structure
A memory device structure includes circuitry formed over a substrate and at least one insulating portion formed over said circuitry, each of which includes a...
US-9,589,917 Microwave monolithic integrated circuit (MMIC) having integrated high power thermal dissipating load
A Microwave Monolithic Integrated Circuit (MMIC) having an integrated high power load. The MMIC includes a microwave transmission line and a resistive load...
US-9,589,916 Inductively coupled transformer with tunable impedance match network
A packaged RF power transistor includes an RF input lead, a DC gate bias lead, an RF power transistor comprising gate, source and drain terminals, and an input...
US-9,589,915 Semiconductor device and manufacturing method thereof
A semiconductor device includes a substrate defined with a seal ring region and a circuit region, the substrate includes a seal ring structure and an integrated...
US-9,589,914 Semiconductor chip
According to various embodiments, a semiconductor chip may include: a semiconductor body region including a first surface and a second surface opposite the...
US-9,589,913 Flip chip stacking utilizing interposer
An interposer and a method for stacking dies utilizing such an interposer in an integrated circuit are disclosed. The interposer includes a substrate and a...
US-9,589,912 Integrated circuit structure with crack stop and method of forming same
A first aspect of the disclosure provides for an integrated circuit structure. The integrated circuit structure may comprise a first metal structure in a first...
US-9,589,911 Integrated circuit structure with metal crack stop and methods of forming same
Embodiments of the present disclosure provide an integrated circuit (IC) structure with a metal crack stop and methods of forming the same. An IC structure...
US-9,589,910 Semiconductor device and method of forming base leads from base substrate as standoff for stacking...
A semiconductor device has a base substrate with first and second opposing surfaces. A first etch-resistant conductive layer is formed over the first surface of...
US-9,589,909 Radio frequency and electromagnetic interference shielding in wafer level packaging using redistribution layers
Radio frequency/electromagnetic interference (RF/EMI) shielding within redistribution layers of a fan-out wafer level package is provided. By using RDL metal...
US-9,589,908 Methods to improve BGA package isolation in radio frequency and millimeter wave products
A method and apparatus are provided for manufacturing a packaged electronic device (200) which includes a carrier substrate (120) in which conductive...
US-9,589,907 Apparatus and method for electrostatic spraying or electrostatic coating of a thin film
Provided is a resist film forming device which uses an electrostatic spray device which is capable of forming a thin film with a uniform thickness on a...
US-9,589,906 Semiconductor device package and method of manufacturing the same
The present disclosure relates to a semiconductor device package and a manufacturing method thereof. The semiconductor package comprises a die pad, a row of...
US-9,589,905 EMI shielding in semiconductor packages
A semiconductor package includes a substrate, a chip disposed over a top surface of the substrate, an electromagnetic interference (EMI) shielding layer...
US-9,589,904 Semiconductor device with bypass functionality and method thereof
A device includes a semiconductor chip and a bypass layer electrically coupled to a contact region of the semiconductor chip. The bypass layer is configured to...
US-9,589,903 Eliminate sawing-induced peeling through forming trenches
A package includes a device die, a molding material encircling the device die, wherein a top surface of the molding material is substantially level with a top...
US-9,589,902 Semiconductor wafer
A semiconductor wafer has formed thereon various types of semiconductor chips and enables different types of semiconductor chips having the same chip size to be...
US-9,589,901 Semiconductor wafers including indications of crystal orientation and methods of forming the same
A wafer can be provided to include a single crystalline semiconductor material with a predetermined crystal orientation. The wafer can include a laser mark at a...
US-9,589,900 Metal pad for laser marking
A package includes a device die, a molding material molding the device die therein, and a plurality of redistribution lines overlying the device die and the...
US-9,589,899 Semiconductor device having a gate cutting region and a cross-coupling pattern between gate structures
In a semiconductor device, a first gate structure having a first end portion is formed on a substrate. A second gate structure is formed on the substrate, and...
US-9,589,898 Semiconductor device having air-gap and method for manufacturing the same
A semiconductor device in which an air-gap located at a side of a bit line stack is extended to an upper part of the bit line stack is disclosed. An embodiment...
US-9,589,897 Trench liner for removing impurities in a non-copper trench
The present disclosure involves a method of fabricating a semiconductor device in a semiconductor technology node that is 5-nanometer or smaller. An opening is...
US-9,589,896 Electroless metal deposition on a manganese or manganese nitride barrier
An electronic circuit structure comprising a substrate, a dielectric layer on top of the substrate and comprising a cavity having side-walls, a manganese or...
US-9,589,895 Whole wafer edge seal
The present invention relates generally to semiconductor devices and more particularly, to a structure and method of creating a non-permeable edge seal around a...
US-9,589,894 Copper interconnect structure and its formation
A structure with improved electromigration resistance and methods for making the same. A structure having improved electromigration resistance includes a bulk...
US-9,589,893 Semiconductor device, semiconductor device design method, semiconductor device design apparatus, and program
A semiconductor device includes a semiconductor chip, which includes a substrate, a multilayer interconnect layer formed over the substrate, a first cell column...
US-9,589,892 Interconnect structure and method of forming the same
An interconnect structure and a method of forming an interconnect structure are disclosed. The interconnect structure includes a contact layer over a substrate,...
US-9,589,891 Contact pad for semiconductor devices
Packaging devices and methods of manufacture thereof for semiconductor devices are disclosed. In some embodiments, a packaging device includes a contact pad...
US-9,589,890 Method for interconnect scheme
A method of fabricating a semiconductor device is disclosed. The method includes forming a first dielectric layer over a substrate, forming a first trench in...
US-9,589,889 Device architecture and method for precision enhancement of vertical semiconductor devices
Improvement of key electrical specifications of vertical semiconductor devices, usually found in the class of devices known as discrete semiconductors, has a...
US-9,589,888 Storage devices, flash memories, and methods of operating storage devices
A storage device is provided including a flash memory, and a controller programming first bit data and second bit data into the flash memory and not backing up...
US-9,589,887 Semiconductor device
Dielectric breakdown is prevented between opposing two semiconductor chips, to improve the reliability of a semiconductor device. A first semiconductor chip has...
US-9,589,886 Semiconductor device, method of manufacturing thereof, circuit board and electronic apparatus
A semiconductor device is provided having a semiconductor element including a plurality of electrodes; first wirings coupled to the electrodes and directed...
US-9,589,885 Device having multiple-layer pins in memory MUX1 layout
An integrated circuit (IC) memory device includes a first conductive layer. The IC memory device also includes a second conductive layer over the first...
US-9,589,884 Integrated circuit device with radio frequency (RF) switches and controller
An integrated circuit device may include the following elements: a first semiconductor substrate; a first transistor set positioned in the first semiconductor...
US-9,589,883 Double-sided chip on film packaging structure and manufacturing method thereof
A double-sided chip on film (COF) packaging structure and a manufacturing method thereof are disclosed. The double-sided COF structure includes a metal layer, a...
US-9,589,882 Semiconductor device
The semiconductor device includes a wiring substrate having a plurality of ball lands formed on a lower surface of a core layer, a solder resist film covering...
US-9,589,881 Driving chip package and display device including the same
A display device includes a display panel and a chip-on-film (COF) bonded to the display panel. The chip-on-film includes a film on which a driving chip is...
US-9,589,880 Method for processing a wafer and wafer structure
A method for processing a wafer in accordance with various embodiments may include: removing wafer material from an inner portion of the wafer to form a...
US-9,589,879 Substrates with through vias with conductive features for connection to integrated circuit elements, and...
A through via (144) contains a conductor (244, 276) passing through a substrate (140) for connection to an integrated circuit element. The through via consists...
US-9,589,878 Semiconductor package
A semiconductor package includes: an upper package to which an element is mounted, and which includes a metal pad portion; a metal post connected to the metal...
US-9,589,877 Semiconductor device and method for manufacturing the same
A semiconductor device includes an expanded semiconductor chip having a first semiconductor chip and an expanded portion extending outward from a side surface...
US-9,589,876 Semiconductor device and method of forming a wafer level package with top and bottom solder bump interconnection
A semiconductor device is made by forming solder bumps over a copper carrier. Solder capture indentations are formed in the copper carrier to receive the solder...
US-9,589,875 Semiconductor packages and methods of packaging semiconductor devices
A device is disclosed. The device includes a carrier substrate having first and second major surfaces. The first surface includes a die region and contact pads...
US-9,589,874 Assembly of an integrated circuit chip and of a plate
An assembly is made of an integrated circuit chip and a plate. At least one channel is arranged between the chip and the plate. The channel is delimited by...
US-9,589,873 Leadless chip carrier
A leadless chip carrier comprises a thermal pad for attaching to a printed circuit board (PCB) and an integrated circuit electrically connected to a plurality...
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