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Patent # Description
US-9,595,486 Metal oxide semiconductor structure
A metal oxide semiconductor structure, the structure including: a substrate; a gate electrode, deposited on the substrate; a gate insulation layer, deposited...
US-9,595,485 Microelectronic packages having embedded sidewall substrates and methods for the producing thereof
Methods for fabricating microelectronic packages and microelectronic packages are provided. In one embodiment, the microelectronic package fabrication method...
US-9,595,484 Power converter
In a power converter, a plurality of semiconductor devices and a plurality of cooling plates are stacked. The plurality of semiconductor devices includes a...
US-9,595,483 Cutting device and cutting method
A cutting device includes: an imaging module for capturing first marks and third marks, to produce primary image data; and a control module for aligning, by a...
US-9,595,482 Structure for die probing
A package includes a device die, which includes a metal pillar at a top surface of the device die, and a solder region on a sidewall of the metal pillar. A...
US-9,595,481 Dispersion model for band gap tracking
Methods and systems for determining band structure characteristics of high-k dielectric films deposited over a substrate based on spectral response data are...
US-9,595,480 Method of forming a BICMOS semiconductor chip that increases the betas of the bipolar transistors
The betas of the bipolar transistors in a BiCMOS semiconductor structure are increased by forming the emitters of the bipolar transistors with two implants: a...
US-9,595,479 Method and structure of three dimensional CMOS transistors with hybrid crystal orientations
A method for fabricating a three-dimensional integrated circuit device includes providing a first substrate having a first crystal orientation, forming at least...
US-9,595,478 Dummy gate used as interconnection and method of making the same
Process of using a dummy gate as an interconnection and a method of manufacturing the same are disclosed. Embodiments include forming on a semiconductor...
US-9,595,477 Semiconductor device including an epitaxy region
A method is described which includes providing a substrate and forming a first spacer material layer abutting a gate structure on the substrate. A second spacer...
US-9,595,476 Method for producing semiconductor device and semiconductor device
A semiconductor device includes first and second fin-shaped semiconductor layers on a substrate. First and second pillar-shaped semiconductor layers reside on...
US-9,595,475 Multi-stage fin formation methods and structures thereof
A method for fabricating a semiconductor device having a multi-stage fin profile includes providing a substrate and forming a first spacer having a first spacer...
US-9,595,474 3D IC with serial gate MOS device, and method of making the 3D IC
A die stack comprises a first integrated circuit (IC) die having at least a first device comprising a first source, a first drain and a first gate electrode...
US-9,595,473 Critical dimension shrink through selective metal growth on metal hardmask sidewalls
A method for fabricating a self-aligned via structure includes forming a tri-layer mask on an ILD layer over a lower metal wiring layer, the tri-layer mask...
US-9,595,472 Semiconductor device, and manufacturing method of semiconductor device
According to one embodiment, a manufacturing method of a semiconductor device comprises forming a first pattern and a second pattern to be placed apart on a...
US-9,595,471 Conductive element structure and method
Conductive element structures and methods of manufacture thereof are disclosed. In some embodiments, a method of forming a conductive element in an insulating...
US-9,595,470 Methods of preparing tungsten and tungsten nitride thin films using tungsten chloride precursor
Methods for forming tungsten film using fluorine-free tungsten precursors such as tungsten chlorides are provided. Methods involve depositing a tungsten...
US-9,595,469 Semiconductor device and method for producing the same
A semiconductor device includes a semiconductor body with a front face and a back face, having an active zone located at the front face, a front surface...
US-9,595,468 Method of manufacturing semiconductor device that uses treatment to enhance hydrophilicity of spin coated...
To provide a semiconductor device having improved reliability. After formation of a first insulating film for an interlayer insulating film by spin coating, the...
US-9,595,467 Air gap formation in interconnection structure by implantation process
Methods for forming air gaps in an interconnection structure with desired materials formed on different locations of the interconnection structure using an ion...
US-9,595,466 Methods for etching via atomic layer deposition (ALD) cycles
Methods for etching a substrate are provided herein. In some embodiments, a method for etching a substrate disposed within a processing volume of a process...
US-9,595,465 Vias and methods of formation thereof
In accordance with an embodiment of the present invention, a semiconductor device includes a first metal line in a first insulating layer, and a via having a...
US-9,595,464 Apparatus and method for reducing substrate sliding in process chambers
Methods and apparatus for processing a substrate are disclosed herein. In some embodiments, an apparatus for processing a substrate includes: a substrate...
US-9,595,463 Wafer processing method
A wafer processing method which includes a protective tape attaching step of attaching a protective tape through an adhesive layer to a front side of a wafer in...
US-9,595,462 Peeling system
Disclosed is a peeling system which includes a peeling device, a plurality of first cleaning devices, an inversion device, a second cleaning device, and first...
US-9,595,461 Storage facility and storage method
A storage facility includes a controller for monitoring a supply state of the inactive gas for the plurality of storage sections and for controlling the...
US-9,595,460 Substrate processing apparatus, recording medium and method of manufacturing semiconductor device
A substrate processing apparatus includes first and second process chambers; a mounting section on which a housing vessel that houses the substrate is mounted;...
US-9,595,459 Managing thermal budget in annealing of substrates
A method and apparatus are provided for treating a substrate. The substrate is positioned on a support in a thermal treatment chamber. Electromagnetic radiation...
US-9,595,458 Plasma processing apparatus and method, and method of manufacturing electronic device
In an inductively coupled plasma torch unit, two coils, a first ceramic block, and a second ceramic block are arranged, and an annular chamber is provided....
US-9,595,457 Methods and apparatus for cleaning semiconductor wafers
A method for cleaning semiconductor substrate using ultra/mega sonic device comprising holding a semiconductor substrate by using a chuck, positioning a...
US-9,595,456 Wafer manufacturing cleaning apparatus, process and method of use
A cleaning wafer or substrate for use in cleaning, or in combination with, components of, for example, integrated chip manufacturing apparatus. The cleaning...
US-9,595,455 Integrated circuit module with filled contact gaps
Integrated circuit (IC) modules and methods for manufacturing the IC modules are described. In an embodiment, an IC module includes a substrate with contact...
US-9,595,454 Semiconductor device including electromagnetic absorption and shielding
A semiconductor device is disclosed including material for absorbing EMI and/or RFI The device includes a substrate (202), one or more semiconductor die...
US-9,595,453 Chip package method and package assembly
The present disclosure relates to a chip package method and a package assembly. A metal plate is micro-etched to form trenches having a predetermined depth. A...
US-9,595,452 Residue free oxide etch
A method for selectively etching silicon oxide is provided. A surface reaction phase is provided comprising flowing a surface reaction gas comprising hydrogen,...
US-9,595,451 Highly selective etching methods for etching dielectric materials
Methods for forming high aspect ratio features using an etch process are provided. In one embodiment, a method for etching a dielectric layer to form features...
US-9,595,450 Composite structure for gate level inter-layer dielectric
A method of forming an integrated circuit device includes forming dummy gates over a semiconductor substrate, depositing a first dielectric layer over the dummy...
US-9,595,449 Silicon-germanium semiconductor devices and method of making
Oxidation treatment of a Si.sub.1-xGe.sub.x (0<x<1) substrate forms on the substrate an interfacial layer comprised of silicon oxide and germanium oxide....
US-9,595,448 Method for cleaning plasma processing chamber and substrate
A method for cleaning a plasma processing chamber is provided. The method includes introducing an organic gas into a plasma processing chamber. The organic gas...
US-9,595,447 Detection apparatus, imprint apparatus, and method of manufacturing products
This disclosure provides a detection apparatus configured to detect a moire pattern generated by grid patterns having grid pitches different from each other...
US-9,595,446 Methods of processing substrates
Methods processing substrates are provided. The method may include providing a bonding layer between a substrate and a carrier to bond the substrate to the...
US-9,595,445 Floating body storage device employing a charge storage trench
A charge storage trench structure is provided underneath a body region of a field effect transistor to store electrical charges in a region spaced from the p-n...
US-9,595,444 Floating gate separation in NAND flash memory
A method of forming a NAND flash memory includes anisotropically etching trenches of a gate stack down to an intermediate level in a floating gate polysilicon...
US-9,595,443 Metal gate structure of a semiconductor device
The invention relates to integrated circuit fabrication, and more particularly to a metal gate structure. An exemplary structure for a CMOS semiconductor device...
US-9,595,442 Method of forming semiconductor structure with anti-punch through structure
A method for manufacturing a semiconductor structure is provided. The method includes implanting a first type of dopants in a first region and a second region...
US-9,595,441 Patterning a substrate using grafting polymer material
Patterning methods for creating sub-resolution trenches, contact openings, lines, and other structures at smaller dimensions as compared to using conventional...
US-9,595,440 Method of using a vaporizing spray system to perform a trimming process
A method of semiconductor device fabrication including placing a substrate having a first and second features disposed thereon in a vaporizing spray deposition...
US-9,595,439 Method for preparing nanostructure by electrochemical deposition, and nanostructure prepared thereby
The present invention relates to a method for preparing a nanostructure by electrochemical deposition, and a nanostructure prepared thereby, and more...
US-9,595,438 Method for producing a III/V Si template
A method for producing a monolithic template comprises a Si wafer with a layer of a III/V semiconductor epitaxially applied to its surface. The III/V...
US-9,595,437 Method of forming silicon on a substrate
A method for forming a silicon layer using a liquid silane compound is described. The method includes the steps of: forming a first layer on a substrate,...
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