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Patent # Description
US-9,595,335 Memory device and systems and methods for selecting memory cells in the memory device
A memory device comprises memory cells arranged in rows and columns, and source lines associated with memory sections, each of which includes a plurality of...
US-9,595,334 Apparatus and methods of operating memory for exact and inexact searching of feature vectors
Apparatus and methods of operating a memory include storing a value of an attribute of a feature vector to a pair of memory cells by programming each of the...
US-9,595,333 Nonvolatile memory device and programming method thereof
According to example embodiments, a nonvolatile memory device includes a plurality of cell strings on a horizontal semiconductor layer. Each of the cell strings...
US-9,595,332 High speed, high voltage tolerant circuits in flash path
A circuit includes a first word line coupled to a non-volatile memory (NVM) cell. A first path includes a first inverter and a transistor. The transistor is...
US-9,595,331 Nonvolatile memory device
A nonvolatile memory device may include a plurality of memory blocks each including a drain select line, word lines and a source select line, and a pass...
US-9,595,330 Configurable non-volatile content addressable memory
A Configurable Non-Volatile Content Addressable Memory (CNVCAM) cell consisting of a pair of complementary non-volatile memory devices and a MOSFET...
US-9,595,329 Non-volatile random access memory (NVRAM) with backup control
A memory system has a first plurality of non-volatile random access memory (NVRAM) cells. Each NVRAM cell has a volatile portion coupled to a corresponding...
US-9,595,328 State-changeable device
A state-changeable device includes a first and a second particle arranged in proximity to each other; and a coupling material between the first and the second...
US-9,595,327 Variable resistance memory device and verify method thereof
A resistance variable memory has a controller configured to control a voltage to be applied to the memory cell. The controller has a reset operation to bring...
US-9,595,326 Electronic device
An electronic device comprising a semiconductor memory unit that may include a cell array including a plurality of storage cells; a first line connected to one...
US-9,595,325 Apparatus and methods for sensing hard bit and soft bits
A method is provided for reading a memory cell of a nonvolatile memory system. The method includes generating a hard bit and N soft bits for the memory cell in...
US-9,595,324 Semiconductor memory device
According to an embodiment, a semiconductor memory device comprises: a first wiring line; a memory string connected to this first wiring line; and a plurality...
US-9,595,323 Word line compensation for memory arrays
A method is provided for operating a non-volatile storage system that includes a plurality of bit lines, a word line comb including a plurality of word lines,...
US-9,595,322 Storage device with 2D configuration of phase change memory integrated circuits
A storage device, apparatus, and method to write and/or read data from such storage device. The storage device, comprises a channel controller and phase change...
US-9,595,321 Multi-level reversible resistance-switching memory
A method is provided for operating a reversible resistance-switching memory cell. The method includes programming the reversible resistance-switching memory...
US-9,595,320 Optimization of read thresholds for non-volatile memory
An SSD controller dynamically adjust read thresholds in a NVM to reduce errors due to device threshold voltage distribution shifts, thus improving performance,...
US-9,595,319 Partial/full array/block erase for 2D/3D hierarchical NAND
A novel 2D/3D hierarchical-BL NAND array with at least one plane on independent Psubstrate comprising a plurality of LG groups respectively associated with a...
US-9,595,318 Reduced level cell mode for non-volatile memory
Apparatuses, systems, methods, and computer program products are disclosed for reduced level cell solid-state storage. A method includes determining that an...
US-9,595,317 Multi-state programming for non-volatile memory
A method is provided for programming a non-volatile memory. The method includes programming memory cells for even bit lines by programming the memory cells into...
US-9,595,316 Design-for-test apparatuses and techniques
Embodiments of design-for-test (DFT) apparatuses and related techniques are disclosed herein. In some embodiments, a DFT apparatus may include an SRAM cell,...
US-9,595,315 Semiconductor memory device compensating difference of bitline interconnection resistance
A semiconductor memory device includes a bit line sense amplifier, a first column select gate, and a second column select gate. The bit line sense amplifier...
US-9,595,314 Memory devices, systems and methods employing command/address calibration
During a command/address calibration mode, a memory controller may transmit multiple cycles of test patterns as signals to a memory device. Each cycle of test...
US-9,595,313 Semiconductor device
An object is to increase the retention characteristics of a memory device formed using a wide bandgap semiconductor. A bit line controlling transistor is...
US-9,595,312 Adaptive refresh scheduling for memory
The present disclosure provides for adaptive scheduling of memory refreshes. One embodiment relates to a method of adapting an initial refresh sequence. In this...
US-9,595,311 Nonvolatile semiconductor memory device
According to one embodiment, nonvolatile semiconductor memory device comprises: a memory mat including a memory cell having a variable resistance element; a...
US-9,595,310 Circuits for control of time for read operation, using a current mirror circuit to mirror a reference current...
A circuit for control of time for read operation is disclosed which additionally incorporates a dummy device circuit and a dummy sensitive amplifier circuit,...
US-9,595,309 Semiconductor memory device and method for operating the same
A semiconductor memory device includes a plurality of memory cells coupled to multiple word lines a word line deactivation voltage generation block suitable for...
US-9,595,308 Multiple-die synchronous insertion delay measurement circuit and methods
Circuitry and methods are disclosed for accurately measuring a latency of a data path through multiple FIFO buffers on separate semiconductor dies. A base...
US-9,595,307 Volatile memory device and system-on-chip including the same
A volatile memory device includes a memory cell array configured to be supplied with a first power supply voltage through a first power supply line, and...
US-9,595,306 Control signal generation circuit and non-volatile memory device including the same
A control signal generation circuit may include: a counting unit suitable for generating counting information; a first signal generation unit suitable for...
US-9,595,305 Semiconductor devices
A semiconductor device may be provided. The semiconductor device may include a pre-charge pulse signal generation circuit configured to generate a pre-charge...
US-9,595,304 Current-mode sense amplifier
The invention relates to a current sense amplifier (103) comprising a reference current input terminal (109), a sense control line input terminal (125), a sense...
US-9,595,303 Methods and apparatuses for compensating for source voltage
Apparatuses and methods for compensating for source voltage is described. An example apparatus includes a source coupled to a memory cell and a read-write...
US-9,595,302 Hard disk drive cover with differential inner and outer surface roughness
A hard disk drive cover with a smooth bottom (inner) surface and a textured outer surface is provided for covering a hard disk drive base assembly. A method of...
US-9,595,301 Efficient multichannel data format using variable-length headers
In one embodiment, a computer program product includes a computer readable storage medium having program instructions embodied therewith. The computer readable...
US-9,595,300 Contextual chapter navigation
A system and a method are disclosed for on-screen display that indicates to the user the current point in the playback of the video within the context of the...
US-9,595,299 Method and apparatus for adapting audio delays to picture frame rates
To synchronize sound information with corresponding picture information for digital cinema compositions at different frame rates in a play list during play out...
US-9,595,298 Transforming data to create layouts
Concepts and technologies are described herein for transforming data to create layouts. In accordance with the concepts and technologies disclosed herein, a...
US-9,595,297 Apparatuses and methods for defining color regimes
To allow a better coordination between an image creation artist such as a movie director of photography and the final viewer (via the display and its built-in...
US-9,595,296 Multi-stage production pipeline system
Multi-stage production pipeline system that may be utilized in conjunction with a motion picture project management system. The multi-stage production pipeline...
US-9,595,295 Algorithmic based approach to image substitution for overcoming inappropriate apparent rotation of vehicle...
Apparatus and methods are described to overcome the perception in viewed video or other presentations containing moving vehicles that the apparent rotation rate...
US-9,595,294 Methods, systems and apparatuses for multi-directional still pictures and/or multi-directional motion pictures
The disclosure is generally directed to methods, systems and apparatuses for multi-directional still pictures and/or multi-directional motion pictures and their...
US-9,595,293 Method and apparatus for composition of subtitles
Embodiments of the invention include a subtitling format encompassing elements of enhanced syntax and semantic to provide improved animation capabilities. The...
US-9,595,292 Image processing apparatus
An image processing apparatus includes a specifying unit and a processing unit. The specifying unit specifies an editing position in moving image data contained...
US-9,595,291 Columnar data storage on tape partition
A method for writing data from a table to a tape includes setting a number of partitions on the tape, where the number of partitions is greater than or equal to...
US-9,595,290 Method of manufacturing fluid bearing apparatus and spindle motor including press working a cylindrical inner...
A method of manufacturing a fluid bearing apparatus includes plating a metallic base material including a cylindrical base material inner circumferential...
US-9,595,289 Providing device-level functionality without altering instructions stored in device memory
Systems, methods, and machine-readable media provide device-level functionality without altering device memory. A non-transitory machine-readable medium can...
US-9,595,288 Laser mode hopping detection in a heat-assisted magnetic recording drive
A method comprises performing a write operation using a heat-assisted magnetic recording (HAMR) drive operating at a plurality of temperatures. The method...
US-9,595,287 Recording and reproducing apparatus
A recording and reproducing apparatus according to the present disclosure includes a first optical pickup configured to record information on either a land...
US-9,595,286 Glass substrate for magnetic disk and magnetic disk
A magnetic-disk glass substrate has a circular center hole, a pair of main surfaces and an edge surface. The edge surface has a side wall surface and chamfered...
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