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Patent # Description
US-9,594,734 Meta tag ownership and control
Personalized metadata may be selected from a group of tags, where the tags include annotations, synopsis, references, etc. and owner controlled rules for...
US-9,594,733 Progress bars showing download progress of objects of a web page and thumbnails indicating where on the web...
Methods of receiving and displaying a server page and information thereof in an electronic device, particularly a wireless device operating in a slow...
US-9,594,732 Selectively replacing displayed content items based on user interaction
Systems, methods performed by data processing apparatus and computer storage media encoded with computer programs for receiving feedback from a client device at...
US-9,594,731 WYSIWYG, browser-based XML editor
Computer-implemented methods and computer-readable storage media are disclosed for facilitating browser-based, what-you-see-is-what-you-get (WYSIWYG) editing of...
US-9,594,730 Annotating HTML segments with functional labels
A method and apparatus is described for assigning functional labels to segments of web pages in an application-independent way. In the approach described...
US-9,594,729 Content navigation and zooming on a mobile device
The contents displayed on the touch screen of a mobile device are modified based in user input, in the form of touch input. In one mode, a content view,...
US-9,594,728 Device and method for determining an estimate of the logarithm of an input variable
The disclosure relates to a device for determining an estimate of the logarithm of an input variable. The device has an approximation unit which is designed to...
US-9,594,727 Optimization of parasitic capacitance extraction using statistical variance reduction technique
A method for performing parasitic capacitance extraction of an integrated circuit (IC) design includes: defining a Gaussian surface around an origin net of the...
US-9,594,726 Systems and methods for solving computational problems
Solving computational problems may include generating a logic circuit representation of the computational problem, encoding the logic circuit representation as...
US-9,594,725 Safety score using video data but without video
A safety score using video data but without video comprises an input interface and a processor. The input interface is configured to receive sensor data. The...
US-9,594,724 Vector register file
An aspect includes accessing a vector register in a vector register file. The vector register file includes a plurality of vector registers and each vector...
US-9,594,723 Apparatus, system and method for configuration of adaptive integrated circuitry having fixed, application...
An adaptive computing engine (ACE) IC includes a plurality of heterogeneous computational elements coupled to an interconnection network. The plurality of...
US-9,594,722 System provisioning optimization
A method, system and program product for optimizing of the provisioning of systems. The method, system, computer program product for provisioning a system...
US-9,594,721 Datacenter event handling
Systems and methods for handling resources in a computer system differently in certain situations, such as catastrophic events, based upon an assigned layer of...
US-9,594,720 Interface between a bus and a inter-thread interconnect
A processing apparatus comprising: a bus; a first processor connected to the bus and configured to communicate over the bus according to a bus protocol; a...
US-9,594,719 Seamless addition of high bandwidth lanes
Seamless addition of high bandwidth lanes, including the steps of: sending, by a master, an idle sequence using 7b/10b code words over new high bandwidth lanes...
US-9,594,718 Hardware accelerated communications over a chip-to-chip interface
A device and method for communicating, via a memory-mapped communication path, between a host processor and a cellular-communication modem are disclosed. The...
US-9,594,717 Method and apparatus to facilitate system to system protocol exchange in back to back non-transparent bridges
A dual host system and method with back to back non-transparent bridges and a proxy packet generating mechanism. The proxy packet generating mechanism enables...
US-9,594,716 Pluggable module for signal relay between communication cards
Techniques are described for an electronic device in which a communication plane having a plurality of slots for receiving communication cards further includes...
US-9,594,715 Integrated circuit devices, systems and methods having automatic configurable mapping of input and/or output...
Integrated circuit devices are disclosed with receive ports having mapping circuits automatically configurable to change a logical mapping of data received on...
US-9,594,714 Multi-channel storage system supporting a multi-command protocol
Techniques are generally described related to a multi-channel storage system. One example multi-channel storage system may include a plurality of...
US-9,594,713 Bridging strongly ordered write transactions to devices in weakly ordered domains, and related apparatuses,...
Bridging strongly ordered write transactions to devices in weakly ordered domains, and related apparatuses, methods, and computer-readable media are disclosed....
US-9,594,712 Device, method and system for communicating with a control unit of a motor vehicle
A control unit for controlling or regulating a component, including a processing arrangement for controlling or regulating the component for connecting the...
US-9,594,711 Systems and methods for achieving continuation of experience between components in a hybrid environment
Systems and methods described herein provide for a process for managing continuity of experience between operation of a hybrid computer system in the connected...
US-9,594,710 Implementing extent granularity authorization command flow processing in CAPI adapters
A method, system and computer program product are provided for implementing block extent granularity authorization command flow processing for a Coherent...
US-9,594,709 Time and event based message transmission
A system, apparatus and method for efficient utilization of available band-width on the system's bus connection. The system includes a scheduler configured to...
US-9,594,708 Data processing device and data transfer control device
A data processing device includes: a processing block which is connected to a common bus and which processes a plurality of data, which is inputted...
US-9,594,707 Data input/output (I/O) handling for computer network communications links
Systems and methods for performing data input/output (I/O) operations using a computer network communications link are described. A method may include assigning...
US-9,594,706 Island-based network flow processor with efficient search key processing
A Island-Based Network Flow Processor (IBNFP) includes a memory and a processor located on a first island, a Direct Memory Access (DMA) controller located on a...
US-9,594,705 EMI mitigation on high-speed lanes using false stall
Methods and apparatus relating to techniques for Electromagnetic Interference (EMI) mitigation on high-speed lanes using false stall are described. In one...
US-9,594,704 User mode interrupts
A method includes for each processed interrupt: identifying an interrupt associated with a first interrupt number; determining that the interrupt is designated...
US-9,594,703 Architecture and method for managing interrupts in a virtualized environment
A method may comprise identifying a signal indicating real-time mode operation for a guest operating system (OS) and directly routing an interrupt for a first...
US-9,594,702 Multi-processor with efficient search key processing
A multi-processor includes a shared memory that stores a search key data set including multiple search keys, a processor, a Direct Memory Access (DMA)...
US-9,594,701 Information processing apparatus, information processing method, and non-transitory computer readable medium
An information processing apparatus includes first and second central processing units, a communication unit, and a memory. The first and second central...
US-9,594,700 Speculative memory controller
A method and a system are provided for controlling memory accesses. Memory access requests including at least a first speculative memory access request and a...
US-9,594,699 Additional security in flashless modem
Various systems and methods for implementing additional security in a flashless modem are described herein. A modem system for implementing additional security...
US-9,594,698 Local keying for self-encrypting drives (SED)
A method and system self encrypts a disk storage device. Given a plurality of data storage devices, the system establishes an encryption key for the plurality...
US-9,594,697 Apparatus and method for asynchronous tile-based rendering control
An apparatus and method are described for asynchronous tile-based rendering control. In one embodiment of the invention, there is a delay between when the...
US-9,594,696 Systems and methods for automatic generation of parallel data processing code
Various systems and methods to generate automatically a procedure operative to distributively process a plurality of data sets stored on a plurality of memory...
US-9,594,695 Supporting data compression using match scoring
A processing system is provided that includes a memory for storing an input bit stream and a processing logic, operatively coupled to the memory, to generate a...
US-9,594,694 Dynamic evaluation and adaption of hardware hash functions
Creating hash values based on bit values of an input vector. An apparatus includes a first and a second hash table, a first and second hash function generator...
US-9,594,693 Method and apparatus for accessing data stored in a storage system that includes both a final level of cache...
A data access system including a storage drive, processor and cache module. The processor, in response to data required by the processor not being cached within...
US-9,594,692 Sharing data structures between processes by semi-invasive hybrid approach
Techniques herein are for sharing data structures between processes. A method involves obtaining a current memory segment that begins at a current base address...
US-9,594,691 Multi-core programming apparatus and method for restoring data arrays following a power gating event
An apparatus includes a programmer, a stores, and a plurality of cores. The programmer programs a fuse array with compressed configuration data. The stores...
US-9,594,690 Multi-core microprocessor power gating cache restoral programming mechanism
An apparatus includes a device programmer and a stores. The device programmer programs a semiconductor fuse array with compressed configuration data for a...
US-9,594,689 Designated cache data backup during system operation
In an approach for backing up designated data located in a cache, data stored within an index of a cache is identified, wherein the data has an associated...
US-9,594,688 Systems and methods for executing actions using cached data
Described herein are systems and methods to execute efficiently a plurality of actions, in which multiple actions require the use of a single data set. The data...
US-9,594,687 Virtualization-aware prefetching
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for pre-fetching content. One of the systems includes a...
US-9,594,686 File handling within a cloud-based file system
In one general aspect, a computer-readable storage medium can be configured to store instructions that when executed cause one or more processors to perform a...
US-9,594,685 Criteria for selection of data for a secondary cache
Host read operations affecting a first logical block address of a data storage device are tracked. The data storage device includes a main storage and a...
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