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Patent # Description
US-9,594,684 Method for temporarily storing data and storage device
A method for temporarily storing data and a storage device is provided. The method for temporarily storing data is applied to the storage device, and the...
US-9,594,683 Data processing in a multiple processor system to maintain multiple processor cache memory access coherency
A data processing system including multiple processors with a hierarchical cache structure comprising multiple levels of cache between the processors and a main...
US-9,594,682 Data access system, memory sharing device, and data reading method
A control apparatus sends a data access request to a first memory sharing device, wherein the data access request includes an address of target data. The first...
US-9,594,681 Dynamically configurable memory
A device includes a memory including ways and a processor in communication with the memory. The processor is configured to execute logic. The logic can monitor...
US-9,594,680 Identifying stale entries in address translation cache
A mapping may be changed in a table stored in memory. The table may map a first set of addresses, for a set of data, to a second set of addresses. The changing...
US-9,594,679 Flash cache flushing method and system
A flash memory system that uses repeated writing of the data to achieve stable storage, is adapted for efficient cache flushing operations by utilizing a part...
US-9,594,678 Preventing duplicate entries of identical data in a storage device
Preventing duplicate entries of identical data in a storage device, including: receiving a write request to write data to the storage device; calculating one or...
US-9,594,677 Computer system, data management method, and recording medium for storing program
A search server for which data stored in a hierarchical control server utilizing a plurality of storage devices is the object of a search, wherein the search...
US-9,594,676 Configuring and reconfiguring blocks of memory cells to store user data and ECC data
A memory device has a plurality of individually erasable blocks of memory cells and a controller configured to configure a first block of memory cells in a...
US-9,594,675 Virtualization of chip enables
Virtual chip enable techniques perform memory access operations on virtual chip enables rather than physical chip enables. Each virtual chip enable is a...
US-9,594,674 Method and system for garbage collection of data storage systems using live segment records
Containers of a storage system are scanned, each container containing segments of files, where each file is represented by a file tree having segments in a...
US-9,594,673 Driving method of memory controller and nonvolatile memory device controlled by memory controller
A method is for driving a memory controller which is configured to control a nonvolatile memory device. The method includes counting a number of error bits of...
US-9,594,672 Test case generation
Embodiments of the present invention provide methods, computer program products, and systems for generating comprehensive test cases covering new events yet to...
US-9,594,671 System and method for resource modeling and simulation in test planning
A method includes generating a test model based on at least one of test group dependencies and test group constraints and generating a resource base. The method...
US-9,594,670 Managing software dependencies during software testing and debugging
A solution for managing software dependencies during software testing and debugging includes a capture module configured to capture a software call stack of a...
US-9,594,669 Debug management using a counter
Disclosed aspects include identifying basic blocks of a program. For each basic block, the compiler inserts an identifier that includes the function name, and...
US-9,594,668 Debugger display of vector register contents after compiler optimizations for vector instructions
An optimizing compiler includes a vector optimization mechanism that optimizes vector instructions by eliminating one or more vector element reverse operations....
US-9,594,667 Enhancing weak consistency
Methods to discover weak consistency errors in an application, by executing, by a debugger, a first thread of the application, by, determining that a first...
US-9,594,666 Enhancing weak consistency
Systems, methods, and computer program products to discover weak consistency errors in an application, by executing, by a debugger, a first thread of the...
US-9,594,665 Regression evaluation using behavior models of software applications
Comparisons of different versions of an application may be compared using a behavior model of the application. A behavior model may be derived from n-gram...
US-9,594,664 Correlating multiple disjoint events via an operation identifier
A system and method for correlating asynchronous operations via an operation identifier comprises receiving an originating operation from a first system that...
US-9,594,663 Apparatus and method for collecting log information from a plurality of servers
A server apparatus is provided for collecting log information from a plurality of servers that execute a series of processes in response to a first request from...
US-9,594,662 Automated instrumentation of applications
Methods for automatically identifying and instrumenting application classes and methods for a particular application are described. In some embodiments,...
US-9,594,661 Method for executing a query instruction for idle time accumulation among cores in a multithreading computer system
Embodiments relate to idle time accumulation in a multithreading computer system. According to one aspect, a computer-implemented method for idle time...
US-9,594,660 Multithreading computer system and program product for executing a query instruction for idle time accumulation...
Embodiments relate to idle time accumulation in a multithreading computer system. According to one aspect, a computer system includes a configuration having a...
US-9,594,659 CPU utilization metering on systems that include multiple hardware threads per core
Indicating usage in a system includes implementing a performance counter associated with one or more hardware threads; counting events associated with the one...
US-9,594,658 Method for displaying operation states of modules included in computer system
A method for obtaining and displaying operation states of a plurality of modules of a system. The operation state of one module that is carrying out a current...
US-9,594,657 Method of analysing memory usage and user terminal performing the same
This application relates to a method of analyzing the memory usage being performed on a user terminal, the user terminal executing a plurality of application...
US-9,594,656 Analysis and visualization of application concurrency and processor resource utilization
An analysis and visualization depicts how an application is leveraging computer processor cores in time. The analysis and visualization enables a developer to...
US-9,594,655 Cache debug system for programmable circuits
An integrated circuit may be provided with system-on-chip circuitry including system-on-chip interconnects and a microprocessor unit subsystem. The subsystem...
US-9,594,654 Generating and detecting hang scenarios in a partially populated simulation environment
A method, system and computer-usable medium are disclosed for detecting the cause of a system hang in a verification environment. Hardware components associated...
US-9,594,653 Automated local database connection affinity and failover
A first compute node of a plurality of compute nodes of a database cluster may receive a request for a database transaction from a client application. The...
US-9,594,652 Systems and methods for decreasing RAID rebuilding time
A computer-implemented method for decreasing RAID rebuilding time may include (1) identifying data for which there is a need for physical integrity and high...
US-9,594,651 Parallel computer system and control method for parallel computer system
A parallel computer system includes a parallel computer including nodes connected via communication routes and respectively executing calculations, and a...
US-9,594,650 Storage system and a method used by the storage system
Performing failover processing between a production host and a backup host, a storage system is connected to the production host and the backup host. In...
US-9,594,649 Network virtualization policy management system
Concepts and technologies are disclosed herein for providing a network virtualization policy management system. An event relating to a service can be detected,...
US-9,594,648 Controlling non-redundant execution in a redundant multithreading (RMT) processor
In one embodiment, the present invention includes a method for controlling redundant execution such that if an exceptional event occurs, the redundant execution...
US-9,594,647 Synchronization and order detection in a memory system
Embodiments relate to out-of-synchronization detection and out-of-order detection in a memory system. One aspect is a system that includes a plurality of...
US-9,594,646 Reestablishing synchronization in a memory system
Embodiments relate to reestablishing synchronization across multiple channels in a memory system. One aspect is a computer implemented method that includes...
US-9,594,645 Protecting data segments in a computing environment
Various embodiments for protecting data segments by a processor device in a computing environment, are provided. In one embodiment, a method comprises, if an...
US-9,594,644 Converting a serial transaction schedule to a parallel transaction schedule
A method and system for transforming a serial schedule of transactions into a parallel schedule of transaction is disclosed. In one example, a computer system...
US-9,594,643 Handling restores in an incremental backup storage system
Techniques and mechanisms are provided for storing data in a backup storage system. According to various embodiments, a first blockmap in a backup storage...
US-9,594,642 Iterative decode and post-decode microcode cut and paste optimization
Various embodiments for data error recovery in a tape storage system, by a processor device, are provided. In one embodiment, a method comprises, in a tape...
US-9,594,641 Techniques for updating memory of a chassis management module
A technique for data roll-back includes in response to a first external static memory device being coupled to a first chassis management module and the first...
US-9,594,640 Backup/recovery system and method for a computing environment
A backup/recovery system for a computing environment includes a computing device that executes an agent to obtain a recovery plan (RP) comprising one or more...
US-9,594,639 Configuring storage resources of a dispersed storage network
A method begins by a processing module of a dispersed storage network (DSN) ascertaining a decode threshold value for dispersed storage error encoding data for...
US-9,594,638 Host recovery using a secure store
Approaches are described for enabling a host computing device to store credentials and other security information useful for recovering the state of the host...
US-9,594,637 Deploying parallel data integration applications to distributed computing environments
System, method, and computer program product to process parallel computing tasks on a distributed computing system, by computing an execution plan for a...
US-9,594,636 Management of data replication and storage apparatuses, methods and systems
The MANAGEMENT OF DATA REPLICATION AND STORAGE APPARATUSES, METHODS AND SYSTEMS ("BDR") transform machine datasets using BDR components into replications over a...
US-9,594,635 Systems and methods for sequential resilvering
Implementations claimed and described herein provide systems and methods for the efficient rebuilding of a failed storage device through sequential resilvering....
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