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Patent # Description
US-9,600,424 Semiconductor chips, semiconductor chip packages including the same, and semiconductor systems including the same
Semiconductor chips are provided. The semiconductor chip includes a first data pad, a first data strobe pad and a second data pad sequentially arrayed from a...
US-9,600,423 Periodic access of a hardware resource
An example includes periodic access of a hardware resource of a computer by instructions in firmware of the computer that are executed by an interpreter in the...
US-9,600,422 Monitoring accesses to memory in a multiprocessor system
Embodiments of the present invention provide methods and apparatus in a multiprocessor system, whereby a set of rules relating to memory access are created and...
US-9,600,421 Systems and methods for low-latency encrypted storage
Encrypted storage often introduces unwanted latency in access. This delay can result in a processor having to wait for critical data thus slowing performance....
US-9,600,420 Reducing decompression time without impacting compression ratio
Aspects include computing devices, systems, and methods for implementing executing decompression of a compressed page. A computing device may determine a...
US-9,600,419 Selectable address translation mechanisms
An address translation capability is provided in which translation structures of different types are used to translate memory addresses from one format to...
US-9,600,418 Systems and methods for improving processor efficiency through caching
Certain embodiments herein relate to using tagless access buffers (TABs) to optimize energy efficiency in various computing systems. Candidate memory references...
US-9,600,417 Data caching
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for caching data not frequently accessed. One of the methods...
US-9,600,416 Apparatus and method for implementing a multi-level memory hierarchy
A system and method are described for integrating a memory and storage hierarchy including a non-volatile memory tier within a computer system. In one...
US-9,600,415 Method, apparatus, and computer program stored in computer readable medium for managing storage server in...
Disclosed is a method of managing a storage server in a database system. Provided is a storage server including a cache device to store at least one block that...
US-9,600,414 Concurrent memory operations
Subject matter disclosed herein relates to performing concurrent memory operations.
US-9,600,413 Common platform for one-level memory architecture and two-level memory architecture
Technologies for one-level memory (1LM) and two-level memory (2LM) configurations in a common platform are described. A processor includes a first memory...
US-9,600,412 Secure virtual access for real-time embedded devices
An arbiter circuit and a translation circuit. The arbiter circuit may be configured to generate a first address signal in a virtual memory space by arbitrating...
US-9,600,411 System and method for determining an object's lifetime in an object oriented environment
A system and method determines an object's lifetime. An object lifecycle engine may work with an object oriented environment. As objects are created, an object...
US-9,600,410 ReRAM based NAND like architecture with configurable page size
Providing a RRAM based memory storage device that has a NAND memory type architecture with a configurable page size. In an embodiment, two memory registers can...
US-9,600,409 Method and system for garbage collection in a storage system based on longevity of stored data
A method for managing data. The method includes receiving a first request to write data to persistent storage and in response to the first request, writing the...
US-9,600,408 Data storage device and method for flash block management
The invention provides a data storage device. In one embodiment, the data storage device is coupled to a host, and comprises a flash memory and a controller....
US-9,600,407 Generation of far memory access signals based on usage statistic tracking
A method is described that entails receiving an address for a read or write transaction to a non volatile system memory device. The method further involves...
US-9,600,406 Data tuple testing and routing for a streaming application
A tuple testing and routing operator in a streaming application routes data tuples to multiple parallel test operators that test in parallel the data tuples,...
US-9,600,405 Systems and methods for testing a software application
Systems, methods, and computer-readable media are disclosed for testing a software application. An exemplary method includes storing a control file identifying...
US-9,600,404 Method and system for providing storage checkpointing to a group of independent computer applications
A method and system for storage checkpointing of an independent computer application. The independent computer application is launched by a coordinator; and the...
US-9,600,403 Method and system for creating functional model of test cases
A method, product and apparatus for creating functional model of test cases. The method comprising obtaining a set of test cases, wherein each test case of the...
US-9,600,402 Application programming interface testing services
Technologies and implementations for providing an application programming interface (API) testing services for transferring data center services. In some...
US-9,600,401 Automated GUI testing
The invention relates to a computer system that may include a processor, an accessibility API, a GUI, and a test module. The test module may use the...
US-9,600,400 Performance testing of web application components using image differentiation
Systems and methods for measuring the rendering time for individual components of a software application, such as a single page application (SPA). Baseline...
US-9,600,399 Content recording method and device
Disclosed are a content recording method and device, for use in software development. The method includes: capturing the content displayed on a screen in the...
US-9,600,398 Method and apparatus for debugging HDL design code and test program code
Disclosed is a method of debugging a simulation system including design code representing a design of an electronic circuit and test program code configured to...
US-9,600,397 Dynamic debugging method of a software module and corresponding device
When a module is loaded by the operating system kernel, dynamic information of the module, such as the memory addresses of the different sections of the module...
US-9,600,396 Computer-implemented methods and systems for determining application matching status
Computer-implemented systems and methods are provided for determining application matching status. In one implementation, a method is implemented with one or...
US-9,600,395 Software quality evaluating system and methods for determining an extent of software code changes
A method for determining an extent of code changes upon implementation of a software modification has the steps of: registering the number of software code...
US-9,600,394 Stateful detection of anomalous events in virtual machines
The disclosed embodiments provide a system that detects anomalous events. During operation, the system obtains machine-generated time-series performance data...
US-9,600,393 Testing of application service versions on live data
Some embodiments include a computer server implementing a splitter engine to perform testing of a pre-production version of an application service against live...
US-9,600,392 Tracking pipelined activity during off-core memory accesses to evaluate the impact of processor core frequency...
A processor system tracks, in at least one counter, a number of cycles in which at least one execution unit of at least one processor core is idle and at least...
US-9,600,391 Operations management apparatus, operations management method and program
A correlation model generation unit generates a plurality of correlation models each expressing correlations between different types of performance values in a...
US-9,600,390 Menu usage statistics collection and reporting
Customizing menus for a consumer electronics device, including: preparing menu definitions for the menus to be customized on the consumer electronics device;...
US-9,600,389 Generating performance and capacity statistics
A method and associated system for method for generating performance and capacity statistics that consists of a processor receiving statistical information from...
US-9,600,388 Information processing apparatus that computes power consumption for CPU command
An information processing apparatus includes a hardware processor and a memory storing executable instructions that, when executed by the processor, cause the...
US-9,600,387 Providing efficient data replication for a transaction processing server
Providing efficient data replication for a transaction processing server is provided. A notification is received from the transaction processing server which...
US-9,600,386 Network testbed creation and validation
Embodiments of network testbed creation and validation processes are described herein. A "network testbed" is a replicated environment used to validate a target...
US-9,600,385 Analyzing behavior of a device under test
A method of analyzing behavior of a device under test includes obtaining event traces that include a current sequence trace and a reference sequence trace. The...
US-9,600,384 System-on-chip verification
Disclosed herein are method, system and computer program product embodiments for improving the verification process of a system on chip (SoC). An embodiment...
US-9,600,383 Storage controller, method, and storage medium
A storage controller out of a plurality of storage controllers used in a storage system, each of the plurality of storage controllers being configured to...
US-9,600,382 Error recovery circuit oriented to CPU pipeline
Disclosed is an error recovery circuit facing a CPU assembly line, comprising: on-chip monitoring circuits (1), an error signal statistics module (2), a voltage...
US-9,600,381 Scalable transcoding for streaming audio
Systems and techniques for capturing audio and delivering the audio in digital streaming media formats are disclosed. Several aspects of the systems and...
US-9,600,380 Failure recovery system and method of creating the failure recovery system
When detecting the configuration change or the operating state of a virtual machine of the main system, a VM management unit changes a value of a determination...
US-9,600,379 Protecting data segments in a computing environment
Exemplary method, system, and computer program product embodiments for protecting data segments by a processor device in a computing environment, are provided....
US-9,600,378 Efficient mechanism to replicate data for multiple controllers
An information handling system and method allows implementation of fault-tolerant storage subsystems using multiple storage controllers not themselves...
US-9,600,377 Providing data protection using point-in-time images from multiple types of storage devices
In one aspect, a method includes receiving a request to restore data of a volume, determining if the data is stored at a first storage device or a second...
US-9,600,376 Backup and replication configuration using replication topology
Various systems and methods for configuring backup and replication operations. For example, a method involves a backup system receiving storage configuration...
US-9,600,375 Synchronized flashcopy backup restore of a RAID protected array
For recovering from a RAID array failure in the deduplication repository, creating a new backup volume using a synchronized FC backup of the source production...
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