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Patent # Description
US-9,600,374 System and methods of managing content in one or more repositories
A method of managing documents in an active repository that includes receiving one or more documents having metadata from a plurality of cache repositories;...
US-9,600,373 Method and system for cluster resource management in a virtualized computing environment
Methods and systems for cluster resource management in virtualized computing environments are described. VM spares are used to reserve (or help discover or...
US-9,600,372 Approach for controller area network bus off handling
A system and method for determining when to reset a controller in response to a bus off state. The method includes determining that the controller has entered a...
US-9,600,371 Preserving server-client session context
Methods, devices, and storage media are provided for preserving the context of a server-client session. A server generates an initial context and a context for...
US-9,600,370 Server system
A server system is disclosed herein, which includes a first BIOS chip, a second BIOS chip, a platform controller, and a baseboard management controller. The...
US-9,600,369 Operating system recovery method and apparatus, and terminal device
An operating system recovery method is provided. The method includes starting a level 2 kernel, and transferring an image file of a to-be-recovered operating...
US-9,600,368 Method and system for service-aware parity placement in a storage system
A method and system for service-aware parity placement in a storage system, including after receiving the service notification specifying a target SD: writing a...
US-9,600,367 Bit interleaver for low-density parity check codeword having length of 16200 and code rate of 4/15 and...
A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first...
US-9,600,366 Error detection and correction circuitry
Integrated circuits with memory circuitry may include error detection circuitry and error correction circuitry. The error detection circuitry may be used to...
US-9,600,365 Local erasure codes for data storage
In some examples, an erasure code can be implemented to provide for fault-tolerant storage of data. Maximally recoverable cloud codes, resilient cloud codes,...
US-9,600,364 Memory controller, storage device and decoding method
According to an embodiment, a row decoder to perform row decoding by using, as row soft input information, a row received word read as soft determination...
US-9,600,363 Data accessing method, memory controlling circuit unit and memory storage apparatus
A data accessing method for a memory storage apparatus is provided. The method includes using a first check code circuit to generate a first check code...
US-9,600,362 Method and apparatus for refreshing and data scrubbing memory device
At least one refresh without scrubbing is performed on a corresponding portion of the memory device with a first frequency. In addition, at least one refresh...
US-9,600,361 Dynamic partial blocking of a cache ECC bypass
An aspect includes receiving a fetch request for a data block at a cache memory system that includes cache memory that is partitioned into a plurality of cache...
US-9,600,360 Dynamic partial blocking of a cache ECC bypass
An aspect includes receiving a fetch request for a data block at a cache memory system that includes cache memory that is partitioned into a plurality of cache...
US-9,600,359 Local error detection and global error correction
An example system in accordance with an aspect of the present disclosure is to use local error detection (LED) and global error correction (GEC) information to...
US-9,600,358 Scalable monitoring and error handling in multi-latency systems
Example embodiments of the present invention provide a method, an apparatus, and a computer program product for scalable monitoring and error handling in...
US-9,600,357 Error detection method of failsafe software
Disclosed is an error detection method of fail safe software, the method including outputting a pulse signal according to an operation state of fail safe...
US-9,600,356 Allocating field-programmable gate array (FPGA) resources
A system for allocating field programmable gate array (FPGA) resources, comprises a plurality of FPGAs operable to implement one or more pipeline circuits; and...
US-9,600,355 Redundant encoding
Analyzing data is disclosed. Error events are tracked. The error events are classified based on a number of errors included in each event. A desired level of...
US-9,600,354 VTL adaptive commit
According to one embodiment, a virtual tape library (VTL) receives a plurality of small computer system interface (SCSI) data objects, and translates the SCSI...
US-9,600,353 Persistent and resilient worker processes
In the field of computing, many scenarios involve the execution of an application within a virtual environment (e.g., web applications executing within a web...
US-9,600,352 Memory management
At least certain embodiments of the present disclosure include a method for memory management of a view of an application displayed on a display of a device....
US-9,600,351 Inversion-of-control component service models for virtual environments
In the field of computing, many scenarios involve the execution of an application within a virtual environment of a device (e.g., web applications executing...
US-9,600,350 Delivery of a user interface using hypertext transfer protocol
A method is provided to remotely access an application hosted by a server and having a corresponding application graphical user interface (GUI) represented on...
US-9,600,349 TASKS.sub.--RCU detection of tickless user mode execution as a quiescent state
A TASKS_RCU grace period is detected whose quiescent states comprise a task undergoing a voluntary context switch, a task running in user mode, and a task...
US-9,600,348 Recording activity of software threads in a concurrent software environment
The present disclosure provides a computer program product and activity recording system for identifying idleness in a processor via a concurrent software...
US-9,600,347 Verifying synchronization coverage in logic code
A computer implemented system and method for measuring synchronization coverage for one or more concurrently executed threads is provided. The method comprises...
US-9,600,346 Thread scheduling across heterogeneous processing elements with resource mapping
A system and program product for scheduling processes of a workload on a plurality of hardware threads configured in a plurality of processing elements of a...
US-9,600,345 Rebalancing virtual resources for virtual machines based on multiple resource capacities
A workload of a virtualized computing environment is rebalanced by resizing and/or moving one or more virtual machines allocated resources from a shared pool of...
US-9,600,344 Proportional resizing of a logical partition based on a degree of performance difference between threads for...
Techniques for enabling high-performance computing are provided. The techniques include resizing a logical partition in a non-dedicated compute cluster server...
US-9,600,343 System and method for analyzing computing system resources
It has been recognized that to accurately measure the required resource capacity of computing systems such as servers, various relevant factors should be...
US-9,600,342 Managing parallel processes for application-level partitions
Various techniques are described herein for creating data partition process schedules and executing such partition schedules using multiple parallel process...
US-9,600,341 Transaction sticky load balance policies
A transaction sticky load balance policy allows a remote client to choose a target server node from a server cluster to provide a transaction service. The load...
US-9,600,340 Iterative and hierarchical processing of request partitions
Methods and systems disclosed herein relate generally to temporally prioritizing queries of queue-task partitions based on distributions of flags assigned to...
US-9,600,339 Dynamic sharing of unused bandwidth capacity of virtualized input/output adapters
A method utilizes priority-based bandwidth allocation to reallocate unused bandwidth capacity of a virtualized IO resource such as a self-virtualizing IO...
US-9,600,338 Processing element placement tool
A method, system, and computer program product for selectively associating one or more processing elements, or portions thereof, to one or more compute nodes....
US-9,600,337 Congestion avoidance in network storage device using dynamic weights
Methods, systems, and computer programs are presented for allocating CPU cycles and disk Input/Output's (IOs) to resource-creating processes based on dynamic...
US-9,600,336 Storing service level agreement compliance data
An apparatus for storing service level agreement ("SLA") compliance data is disclosed. A method and a computer program product also perform the functions of the...
US-9,600,335 Method and system for efficient execution of ordered and unordered tasks in multi-threaded and networked computing
The present disclosure provides methods for concurrently executing ordered and unordered tasks using a plurality of processing units. Certain embodiments of the...
US-9,600,334 Invocation of web services based on a policy file including processes of workflow associated with user roles
Techniques for orchestrating workflows are disclosed herein. In an embodiment, a method of orchestrating a workflow is disclosed. In an embodiment, data is...
US-9,600,333 System and methods for transaction-based process management
Systems and methods for transaction/file-based management of a plurality of processes associated with various jobs are provided. Through the management of...
US-9,600,332 Server load balancing based on virtual utilization, physical utilization, and feedback
Methods and apparatus for providing availability information of a virtual machine to a load balancer are disclosed. The availability information of the virtual...
US-9,600,331 Virtual machine placement in a cloud computing environment based on factors including optimized...
Optimized placement of virtual machines in a cloud environment is based on factors that include processor-memory affinity. A smart migration mechanism (SMM)...
US-9,600,330 Method and system for regulation and control of a multi-core central processing unit
A method and system for regulation and control of a multi-core CPU includes receiving an operating command associated with regulation and control of the...
US-9,600,329 Virtual machine migration method, switch, and virtual machine system
The present invention provides a virtual machine migration method, a switch, a virtual machine system. A switch receives a message sent by a server, where the...
US-9,600,328 Method and apparatus for processing background visual effect
Disclosed are a method and an apparatus for processing a background visual effect. The method is registering dependence resources, running parameters and...
US-9,600,327 Process scheduling and execution in distributed computing environments
Embodiments of the invention provide systems and methods for scheduling and executing user-restricted processes within distributed computing systems. More...
US-9,600,326 Information processing terminal
An information processing terminal including an application execution portion, a sub-application execution portion and a hidden screen display portion is...
US-9,600,325 One-time initialization
Aspects of the present invention are directed at providing safe and efficient ways for a program to perform a one-time initialization of a data item in a...
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