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Patent # Description
US-9,607,878 Shallow trench isolation and formation thereof
One or more methods of forming shallow trench isolation (STI) and resulting semiconductor arraignments are provided. A method of forming STI includes forming a...
US-9,607,877 Substrate structure, semiconductor device, and method for manufacturing the same
The present invention provides a substrate structure, a semiconductor device, and a manufacturing method thereof. The substrate structure comprises: a...
US-9,607,876 Semiconductor devices with back surface isolation
Circuits, structures and techniques for independently connecting a surrounding material in a part of a semiconductor device to a contact of its respective...
US-9,607,875 Adhesive composition, laminate, and stripping method
An adhesive composition for temporarily attaching a substrate to a support plate which supports the substrate, and includes a thermoplastic resin and a release...
US-9,607,874 Plasma processing apparatus
A plasma processing apparatus includes a stage in a processing chamber where plasma is formed, a wafer to be processed, and an electrode arranged at an upper...
US-9,607,873 Apparatus and operation method thereof
An apparatus includes a body and a surface for receiving a semiconductor wafer carrier is provided. A nozzle and a venting hole are provided on the surface. The...
US-9,607,872 Inline system
An inline system including a first apparatus having a first processing unit for processing a workpiece and an unloading area for unloading the workpiece...
US-9,607,871 EFEM system and lid opening/closing method
An object is to prevent down flow gas from entering into a pod in an open state in an EFEM system. An upper canopy is provided along the upper edge of an...
US-9,607,870 Heat treatment apparatus and heat treatment method for heating substrate by irradiating substrate with flash of...
A flash heating part in a heat treatment apparatus includes 30 built-in flash lamps, and irradiates a semiconductor wafer held by a holder in a chamber with a...
US-9,607,869 Bonding system
An object of the present disclosure is to reduce a footprint. A bonding system of the present disclosure includes a first processing station, a second...
US-9,607,868 Substrate heat treatment apparatus
The present invention provides a substrate heat treatment apparatus capable of uniformly heat a substrate at high speed with less breakage of constituent...
US-9,607,867 Substrate processing device and substrate processing method
The invention provides a substrate processing device and a substrate processing method for cooling a substrate, which are capable of conveying a substrate in a...
US-9,607,866 Capacitive coupling plasma processing apparatus and method for using the same
A plasma processing apparatus includes a process container configured to accommodate a target substrate and to be vacuum-exhausted. A first electrode and a...
US-9,607,865 Substrate processing device and substrate processing method
A substrate processing device 100 includes a cleaning liquid supply unit 114 supplying a cleaning liquid to a surface of a substrate W, a solvent supply unit...
US-9,607,864 Dual medium filter for ion and particle filtering during semiconductor processing
The present disclosure is directed to fluid filtering systems and methods for use during semiconductor processing. One or more embodiments are directed to fluid...
US-9,607,863 Integrated circuit package with vacant cavity
Integrated circuit packages with cavity are disclosed. A disclosed integrated circuit package includes a first die. A second die may be coupled to the first die...
US-9,607,862 Extrusion-resistant solder interconnect structures and methods of forming
Various embodiments include methods of forming interconnect structures, and the structures formed by such methods. In one embodiment, a method can include:...
US-9,607,861 Semiconductor device and method of manufacturing the same
A method of manufacturing a semiconductor device, including steps of: (a) bonding a support plate to a first main face of a wafer, the first main face having an...
US-9,607,860 Electronic package structure and fabrication method thereof
A method for fabricating an electronic package structure is provided, which includes the steps of: forming a circuit layer on a conductor; disposing an...
US-9,607,859 Process for manufacturing a semiconductor power device comprising charge-balance column structures and...
Process for manufacturing a semiconductor power device, wherein a trench is formed in a semiconductor body having a first conductivity type; the trench is...
US-9,607,858 Low resistance contacts for semiconductor devices
The invention provides a method of forming at least one Metal Germanide contact on a substrate for providing a semiconducting device (100) by providing a first...
US-9,607,856 Selective titanium nitride removal
Methods are described herein for selectively etching titanium nitride relative to dielectric films, which may include, for example, alternative metals and metal...
US-9,607,855 Etching method and storage medium
An etching method includes: disposing a target substrate including a silicon and a silicon-germanium within a chamber; and performing both of selectively...
US-9,607,854 Methods to reduce debonding forces on flexible semiconductor films disposed on vapor-releasing adhesives
A method comprises providing a handle substrate having a front surface and a back surface; providing a layer of flexible semiconductor material having a front...
US-9,607,853 Patterning method using metal mask and method of fabricating semiconductor device including the same patterning...
A patterning method using a metal mask includes sequentially forming a lower metal layer and an upper metal layer on an etching object layer, forming an upper...
US-9,607,852 Methods of dividing layouts and methods of manufacturing semiconductor devices using the same
Target pattern layouts that include lower and upper target patterns are designed. Each lower target pattern is combined with a upper target pattern that at...
US-9,607,851 Method for removing polysilicon protection layer on a back face of an IGBT having a field stop structure
Disclosed is a method for removing a polysilicon protection layer (12) on a back face of an IGBT having a field stop structure (10). The method comprises...
US-9,607,850 Self-aligned double spacer patterning process
Embodiments of the present disclosure are a method of forming a semiconductor device and methods of patterning a semiconductor device. An embodiment is a method...
US-9,607,849 Pattern-forming method and resist underlayer film-forming composition
A pattern-forming method includes providing a resist underlayer film on a substrate using a resist underlayer film-forming composition. The resist underlayer...
US-9,607,848 Etch process with pre-etch transient conditioning
A method for etching features with different aspect ratios in an etch layer is provided. A plurality of cycles is provided wherein each cycle comprises a...
US-9,607,847 Enhanced lateral cavity etch
A cavity is formed in a semiconductor substrate wherein the width of the cavity is greater than the depth of the cavity and wherein the depth of the cavity is...
US-9,607,846 Polishing of small composite semiconductor materials
A device includes a crystalline material within an area confined by an insulator. A surface of the crystalline material has a reduced roughness. One example...
US-9,607,844 Substrate processing method and substrate processing apparatus
The method includes holding a substrate horizontally with a holding and rotating mechanism; introducing processing liquid from a fluid introduction portion of,...
US-9,607,843 Method for roughness improvement and selectivity enhancement during arc layer etch via adjustment of...
A method of patterning a silicon containing ARC (anti-reflective coating) layer underlying a patterned layer is described that includes establishing a flow of a...
US-9,607,842 Methods of forming metal silicides
A method of forming a metal silicide can include depositing an interface layer on exposed silicon regions of a substrate, where the interface layer includes a...
US-9,607,841 Semiconductor device and method of fabricating the same
Provided is a semiconductor device and a method of fabricating the same. The method may include forming trenches in a substrate and lower gate patterns on the...
US-9,607,840 Method for forming spacers for a transistor gate
A method for forming spacers of a gate of a transistor is provided, including forming a protective layer covering the gate; after the forming the protective...
US-9,607,839 NLDMOS transistor and fabrication method thereof
An N-type Lateral Diffused Metal-Oxide-Semiconductor (NLDMOS) transistor is provided. The NLDMOS transistor comprises a P-type substrate; and a semiconductor...
US-9,607,838 Enhanced channel strain to reduce contact resistance in NMOS FET devices
A semiconductor device includes a substrate, a fin structure and an isolation layer formed on the substrate and adjacent to the fin structure. The semiconductor...
US-9,607,837 Method for forming silicon oxide cap layer for solid state diffusion process
A method for protecting a doped silicate glass layer includes: forming a doped silicate glass layer on a substrate in a reaction chamber by plasma-enhanced...
US-9,607,836 Semiconductor device and manufacturing method of semiconductor device
A manufacturing method of a semiconductor device includes: forming an electric metal layer by depositing metal as art electrode material on an inside of an...
US-9,607,835 Semiconductor device with biased feature
A transistor including a gate structure with a first portion and a second portion; the first and second portions each have a first edge and an opposing second...
US-9,607,834 Trench and hole patterning with EUV resists using dual frequency capacitively coupled plasma (CCP)
A method for etching an antireflective coating on a substrate is disclosed. The substrate comprises an organic layer, an antireflective coating layer disposed...
US-9,607,833 System and method for photomask particle detection
The method includes performing a photolithography process which includes using a photomask to pattern a radiation beam. The photolithography process also...
US-9,607,832 Epitaxial wafer manufacturing device and manufacturing method
Provided is an epitaxial wafer manufacturing device (1) that deposits and grows epitaxial layers on the surfaces of wafers W while supplying a raw material gas...
US-9,607,831 Method for depositing an aluminium nitride layer
A method for depositing an aluminium nitride layer on a substrate is provided that comprises: providing a silicon substrate; placing the substrate in a vacuum...
US-9,607,830 Method of forming germanium film and apparatus therefor
There is provided a method of forming a germanium (Ge) film on a surface of a target object, which includes: supplying an aminosilane-based gas into a...
US-9,607,829 Method of surface functionalization for high-K deposition
A method of surface functionalization for high-k deposition is provided in several embodiments. The method provides interface layer growth with low effective...
US-9,607,828 Method of depositing a silicon-containing film
A method of depositing a silicon-containing film using a film deposition apparatus is provided. The apparatus includes a turntable provided in a process...
US-9,607,827 Method of manufacturing semiconductor device, and recording medium
A method of manufacturing a semiconductor device includes performing a cycle a predetermined number of times, the cycle including supplying a first precursor...
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