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Patent # Description
US-9,691,830 Organic electroluminescent display panel, its manufacturing method and display device
An organic electroluminescent display panel, its manufacturing method and a display device are disclosed. In the organic electroluminescent display panel, a...
US-9,691,822 Organic light emitting diode display and manufacturing method thereof
An organic light emitting diode display including: a substrate; a plurality of first signal lines on the substrate extending in a first direction; a first...
US-9,691,821 Vertical cross-point arrays for ultra-high-density memory applications
An ultra-high-density vertical cross-point array comprises a plurality of horizontal line layers having horizontal lines interleaved with a plurality of...
US-9,691,819 Vertical transistor and variable resistive memory device including the same
A vertical transistor may include a pillar, a gate and an electric field-buffering region. The pillar may be vertically extended from a surface of a...
US-9,691,818 Three dimensional semiconductor device having lateral channel
A 3D semiconductor device and a method of manufacturing the same are provided. The 3D semiconductor device includes a semiconductor substrate, an active line...
US-9,691,817 Magnetic tunnel junctions and methods of forming magnetic tunnel junctions
A method of forming a line of magnetic tunnel junctions includes forming magnetic recording material over a substrate, non-magnetic material over the recording...
US-9,691,812 Photodetector and methods of manufacture
Photodetector structures and methods of manufacture are provided. The method includes forming undercuts about detector material formed on a substrate. The...
US-9,691,795 Display apparatus and manufacturing method thereof
An exemplary embodiment of the described technology relates generally to a display apparatus including a plurality of pixels and corresponding to one area of a...
US-9,691,791 Display panel and display device having the same
A display device includes: a substrate partitioned into a display area including a plurality of pixels for displaying images thereon and a non-display area...
US-9,691,776 Nonvolatile memory device
A nonvolatile memory device may include: an isolation layer formed in a substrate and defining an active region; a control plug formed over the isolation layer;...
US-9,691,775 Combined SADP fins for semiconductor devices and methods of making the same
A semiconductor cell includes a substrate and an array of at least five substantially parallel fins having substantially equal fin widths disposed on the...
US-9,691,774 Structure and method for SRAM cell circuit
The present disclosure provides a static random access memory (SRAM) cell. The SRAM cell includes a first and a second pull-up devices; a first and a second...
US-9,691,772 Semiconductor memory device including memory cell which includes transistor and capacitor
A semiconductor memory device includes a transistor and a capacitor. The transistor includes: an insulating film in which a groove portion is provided; a pair...
US-9,691,771 Vanadium-containing film forming compositions and vapor deposition of vanadium-containing films
Vanadium-containing film forming compositions are disclosed, along with methods of synthesizing the same, and methods of forming Vanadium-containing films on...
US-9,691,770 Vanadium-containing film forming compositions and vapor deposition of vanadium-containing films
Vanadium-containing film forming compositions are disclosed, along with methods of synthesizing the same, and methods of forming Vanadium-containing films on...
US-9,691,756 Nonvolatile memory device and method of fabricating the same
The nonvolatile memory device includes a memory cell having a transistor in which an insulating isolation layer is formed in a channel region. The nonvolatile...
US-9,691,755 Static discharge system
A semiconductor circuit includes a three-terminal high voltage semiconductor device, a charge distribution structure and a static discharge system. The charge...
US-9,691,752 Semiconductor device for electrostatic discharge protection and method of forming the same
An ESD protection device and a method of forming the same, the ESD device includes a substrate, a first doped well, a second doped well, a source and drain...
US-9,691,749 Exclusion zone for stress-sensitive circuit design
A semiconductor structure less affected by stress and a method for forming the same are provided. The semiconductor structure includes a semiconductor chip....
US-9,691,744 Semiconductor memory device including output buffer
A semiconductor module includes a module substrate, a line pattern provided to the module substrate, first and second semiconductor chips on the module...
US-9,691,742 Display device and method of manufacturing the same
A method of manufacturing a display device includes: forming a plurality of photoresist columns at an upper edge region of a glass substrate by a photo...
US-9,691,737 Semiconductor device
Provided is a semiconductor device having as many input/output pads as possible using a chip having a small number of input/output pads. The semiconductor...
US-9,691,736 Miniaturized SMD diode package and process for producing the same
A process for producing a miniaturized SMD diode package involves using a diode chip whose bottom surface has a positive electrode and a negative electrode,...
US-9,691,727 Pad-less interconnect for electrical coreless substrate
A microelectronic device includes a laminated mounting substrate including a die side and a land side with a surface finish layer disposed in a recess on the...
US-9,691,721 Jog design in integrated circuits
A device includes an active region in a semiconductor substrate, a gate strip over and crossing the active region, and a jog over the active region and...
US-9,691,716 Techniques for enhancing fracture resistance of interconnects
Techniques and structure are disclosed for enhancing fracture resistance of back-end interconnects and other such interconnect structures by increasing via...
US-9,691,699 Circuit structure and method for manufacturing the same
A method for manufacturing a circuit structure is described as follows. Two patterned circuit layers are formed on a core layer. The patterned circuit layers...
US-9,691,694 Substrate comprising stacks of interconnects, interconnect on solder resist layer and interconnect on side...
An integrated circuit device that includes a package substrate and a die coupled to the package substrate. The package substrate includes at least one...
US-9,691,693 Carrier-less silicon interposer using photo patterned polymer as substrate
A component, e.g., interposer has first and second opposite sides, conductive elements at the first side and terminals at the second side. The terminals can...
US-9,691,691 Semiconductor package with sidewall contacting bonding tape
A semiconductor package having a structure in which a decoupling capacitor is disposed to be adjacent with a semiconductor chip using a vertical chip...
US-9,691,684 Integrated circuit device including through-silicon via structure and decoupling capacitor and method of...
An integrated circuit device is provided which includes a through-silicon via (TSV) structure and one or more decoupling capacitors, along with a method of...
US-9,691,682 Optoelectronic semiconductor component having an electrically insulating element
An optoelectronic semiconductor component includes an optoelectronic thin-film chip; and a thermally conductive and electrically insulating element, wherein...
US-9,691,681 Laser drilling encapsulated semiconductor die to expose electrical connection therein
A method of making an integrated circuit package that contains a semiconductor die having one or more electrical connections to an electronic circuit within the...
US-9,691,678 Semiconductor device having electrode pads arranged between groups of external electrodes
The semiconductor device has the CSP structure, and may include a plurality of electrode pads formed on a semiconductor integrated circuit in order to...
US-9,691,675 Method for forming an electrical device and electrical devices
A method for forming an electrical device includes attaching a semiconductor die on a carrier. The method further includes dispensing a fillet material at at...
US-9,691,670 Manufacturing method of array substrate
An embodiment of the present invention provides a manufacturing method of an array substrate comprising forming a gate detecting pattern on the array substrate...
US-9,691,667 Integrated circuit and manufacturing method thereof
An integrated circuit includes a semiconductor substrate, and at least two transistors connected in series on the semiconductor substrate, wherein each...
US-9,691,664 Dual thick EG oxide integration under aggressive SG fin pitch
A method of forming a thick oxide layer over fins for EG devices and a thinner oxide layer over fins for SG devices on the same substrate and the resulting...
US-9,691,656 Self-forming embedded diffusion barriers
Interconnect structures containing metal oxide embedded diffusion barriers and methods of forming the same. Interconnect structures may include an M.sub.x level...
US-9,691,655 Etch stop in a dep-etch-dep process
Described herein is a method of forming semiconductor devices. The method comprises depositing an etch stop layer of titanium aluminum carbide in a cavity of a...
US-9,691,654 Methods and devices for back end of line via formation
Back end of line via formation for semiconductor devices and methods of fabricating the semiconductor devices. One method includes, for instance: obtaining a...
US-9,691,640 Mechanisms for cleaning load ports of semiconductor process tools
Embodiments of mechanisms for cleaning load ports of semiconductor process tools are provided. The automatic system includes a vacuum cleaner, a rail, and a...
US-9,691,633 Leadframe and the method to fabricate thereof
The present invention discloses a leadframe in which two conductive pillars with high aspect ratio and the corresponding two leads of the leadframe forms a 3D...
US-9,691,630 Etching method
An etching method includes loading a target substrate W into a chamber 40, the target substrate W having a silicon nitride film formed thereon and at least one...
US-9,691,627 Methods of forming semiconductor devices using auxiliary layers for trimming margin
A method of fabricating a semiconductor device includes forming a linear preliminary mask pattern in a first direction on a substrate. The preliminary mask...
US-9,691,613 Formation of heteroepitaxial layers with rapid thermal processing to remove lattice dislocations
Method and devices are disclosed for device manufacture of gallium nitride devices by growing a gallium nitride layer on a silicon substrate using Atomic Layer...
US-9,691,610 Method for producing a group III nitride semiconductor crystal and method for producing a GaN substrate
The present invention provides a method for producing a Group III nitride semiconductor crystal and a GaN substrate, in which the transfer of dislocation...
US-9,691,607 Process for producing epitaxial silicon carbide single crystal substrate and epitaxial silicon carbide single...
Disclosed is a process for producing an epitaxial single-crystal silicon carbide substrate by epitaxially growing a silicon carbide film on a single-crystal...
US-9,691,605 Semiconductor device and method of manufacturing semiconductor device
A semiconductor device includes a first semiconductor layer made of a nitride semiconductor and formed on a substrate, a second semiconductor layer made of a...
US-9,691,604 LDMOS transistor and fabrication method thereof
A LDMOS transistor includes a semiconductor substrate with a first doping type; a plurality of first trenches formed in the semiconductor substrate; a...
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