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Patent # Description
US-9,734,908 Writing method for resistive memory cell and resistive memory
A writing method for a resistive memory cell and a resistive memory using thereof are provided. In the writing method, a group of RESET signals is provided to...
US-9,734,907 Apparatuses and methods including memory access in cross point memory
Some embodiments include apparatuses and methods having a memory cell, first and second conductive lines configured to access the memory cell, and a switch...
US-9,734,906 Multi-function resistance change memory cells and apparatuses including the same
Various embodiments comprise apparatuses having a number of memory cells including drive circuitry to provide signal pulses of a selected time duration and/or...
US-9,734,905 Non-volatile memory using bi-directional resistive elements
A memory cell includes a first bidirectional resistive memory element (BRME), and a second BRME, a first storage node, and a second storage node. A resistive...
US-9,734,904 Digital low drop-out regulator and resistive memory device using the same
A digital LDO regulator includes a first comparison circuit to compare an output voltage with a reference voltage and to output a reference load switching...
US-9,734,903 Disturb condition detection for a resistive random access memory
A data storage device includes a memory die. The memory die includes a resistive random access memory (ReRAM) having a first portion and a second portion that...
US-9,734,902 Resistive memory device with ramp-up/ramp-down program/erase pulse
In one embodiment, a method of operating a resistive switching device includes applying a signal comprising a pulse on a first terminal of a two terminal...
US-9,734,901 Display device with semiconductor memory cell
The present invention provides a display device including a nonvolatile memory circuit to which data can be added without increasing the number of manufacturing...
US-9,734,900 Memory device architecture
Row electrode drivers and column electrode drivers for a memory device are distributed within a footprint share by a memory cell array.
US-9,734,899 Non-volatile semiconductor memory device adapted to store a multi-valued data in a single memory cell
A non-volatile semiconductor memory device includes an electrically data rewritable non-volatile semiconductor memory cell and a write circuit for writing data...
US-9,734,898 Memory controller having state shaping engine and method of operating same
A memory controller includes a state shaping encoder that receives k-bit write data, selects a logical page with reference to state shape mapping information,...
US-9,734,897 SRAM bitcell structures facilitating biasing of pass gate transistors
Static random access memory (SRAM) bitcell structures with improved minimum operation voltage (Vmin) and yield are provided. The structures may include a...
US-9,734,896 Circuits and methods for performance optimization of SRAM memory
In described examples, a memory controller circuit controls accesses to an SRAM circuit. Precharge mode control circuitry outputs: a burst mode enable signal to...
US-9,734,895 Latching device and method
According to one embodiment of the present disclosure, an apparatus is provided. The apparatus comprises a data input to receive a data signal. The apparatus...
US-9,734,894 Digital filters with memory
A memory device that, in certain embodiments, includes a memory element coupled to a bit-line and a quantizing circuit coupled to the memory element via the...
US-9,734,893 Semiconductor integrated circuit device and system
A semiconductor integrated circuit which can respond to changes of the amount of retained data at the time of standby is provided. The semiconductor integrated...
US-9,734,892 Overvoltage protection for a fine grained negative wordline scheme
A fine grained negative wordline scheme for SRAM memories is disclosed. The scheme includes a circuit having a static random access memory (SRAM) cell including...
US-9,734,890 Systems and methods for individually configuring dynamic random access memories sharing a common command access bus
Systems and methods are disclosed for configuring dynamic random access memory (DRAM) in a personal computing device (PCD). An exemplary method includes...
US-9,734,889 Reconfigurable row DRAM
Technologies are generally described herein for a reconfigurable row dynamic random access memory device. The reconfigurable row may correspond to a logically...
US-9,734,888 Address storage circuit and memory and memory system including the same
A memory including a plurality of word lines to which one or more memory cells are coupled, an address storage unit suitable for storing an input address...
US-9,734,887 Per-die based memory refresh control based on a master controller
An aspect includes reading a plurality of sensor values from a plurality of sensors located on a plurality of memory dies in the HMC. It is determined that one...
US-9,734,886 Cell-based reference voltage generation
Methods, systems, and devices for operating a ferroelectric memory cell or cells are described. A first ferroelectric memory cell may be initialized to a first...
US-9,734,885 Thermal-aware memory
A method for operating a memory system includes receiving thermal data indicating a temperature at addresses in a memory array, and a write request associate...
US-9,734,884 Method for writing to a magnetic tunnel junction device
A method of applying a write current to a magnetic tunnel junction device minimizes sub-threshold leakage. NMOS- and PMOS-follower circuits are used in applying...
US-9,734,883 Reference circuit and MRAM
A reference circuit for a magnetic random access memory (MRAM) is provided. The reference circuit includes a plurality of device strings coupled in parallel....
US-9,734,882 Magnetic memory cells with high write current and read stability
Memory cells and methods of forming thereof are disclosed. The memory cell includes a substrate and first and second select transistors. The first select...
US-9,734,881 High sensing margin magnetic resistive memory device in which a memory cell read and write select transistors...
A memory device and a method for forming a memory device are disclosed. The memory device includes a memory cell having a storage unit coupled to a cell...
US-9,734,880 Apparatuses, methods, and systems for stochastic memory circuits using magnetic tunnel junctions
Embodiments include apparatuses, systems, and methods including a memory apparatus including a plurality of bit cells, wherein each of the plurality of bit...
US-9,734,879 Memory device comprising programmable command-and-address and/or data interfaces
A memory device comprising a programmable command-and-address (CA) interface and/or a programmable data interface is described. In an operational mode, two or...
US-9,734,878 Systems and methods for individually configuring dynamic random access memories sharing a common command access bus
Systems and methods are disclosed for configuring dynamic random access memory (DRAM) in a personal computing device (PCD). An exemplary method includes...
US-9,734,877 Memory interface configurable for asynchronous and synchronous operation and for accessing storage from any clock
A method of operating a memory interface circuit involves selectively operating the memory interface in either a synchronous mode or an asynchronous mode, the...
US-9,734,876 Indirect register access method and system
Systems and methods are provided for managing access to registers. In one embodiment, a system may include a processor and a plurality of registers. The...
US-9,734,875 Semiconductor memory apparatus
A semiconductor memory apparatus includes an effective region which is a portion of the memory region and functions as a data storage space, a residual region...
US-9,734,874 Adhesive leak channel structure for hermetic sealing of a hard disk drive
In the context of a hard disk drive (HDD), an adhesive leak channel structural feature is positioned in an area at which an electrical feed-through is adhered...
US-9,734,873 Screwless drawing box for hard disk drives and hard disk drive swappable module using the same
A screwless hard disk drive (HDD) drawing box and a HDD swappable module are provided, which includes a HDD cartridge for receiving a hard disk drive. The HDD...
US-9,734,872 Method and electronic apparatus for generating time-lapse video and recording medium using the method
A method and an electronic apparatus for generating a time-lapse video and a recording medium using the method are provided. In the method, a movement of the...
US-9,734,871 Voice retrieval apparatus, voice retrieval method, and non-transitory recording medium
A voice retrieval apparatus includes a display, a memory, and a processor executing a voice recording process of storing recorded voices in the memory, an...
US-9,734,870 Media identifier generation for camera-captured media
A video identifier uniquely identifying a video captured by a camera is generated. The video includes video frames and optionally concurrently captured audio as...
US-9,734,869 Method and system for automatic learning of parameters for automatic video and photo editing based on user's...
A method and system for modifying video editing parameters based on users satisfaction. The method may include the following steps: maintaining a plurality of...
US-9,734,868 Marking media files
Methods, systems, and products insert markers into recorded media modules. A pair of reference points is received that marks a position and another position in...
US-9,734,867 Media processing devices for detecting and ranking insertion points in media, and methods thereof
In accordance with an embodiment of the present invention, a method for inserting secondary content into a media stream includes dividing the media stream...
US-9,734,866 Perceptual computing input to determine post-production effects
Systems, apparatuses and methods may provide for detecting an event in visual content including one or more of a video or a still image and searching an effects...
US-9,734,865 Display apparatus and control method thereof
A display apparatus including a display unit, adapted to playback a sequence of images, comprises: a detection configured to detect an attitude of the display...
US-9,734,864 Active control of a read/write head for reduced head-media spacing
The invention generally relates to a system for achieving reduced head-media spacing (HMS) in a hard disk drive (HDD) by providing active control over the...
US-9,734,863 Adjustable dual tensioning tone arm device and assembly
A record player capable of playing phonographic records that may be played in a scratch style by a user. The record player includes a tonearm that is rotatably...
US-9,734,862 Method and apparatus for writing test tracks on a magnetic recording medium
A first tone is written at a first frequency to outer tracks that surround an inner track of a magnetic recording medium. A second tone is written at a second...
US-9,734,861 In-circuit calibration method of anti-aliasing filter
A computer-implemented method, according to one embodiment, includes, for a particular data read clock value, generating a series of symmetrical square wave...
US-9,734,860 Systems and methods for a data processing using integrated filter circuit
Systems and methods are disclosed relating generally to data processing, and more particularly to applying low pass and rotation filtering in relation to data...
US-9,734,859 Quadrature track error signal for optical recording media and devices
A method for providing tracking error signals in an optical data storage system includes a step of receiving a wobble signal having a first frequency from the...
US-9,734,858 Optical information recording/reproduction method and device
It is possible to provide a new information recording/reproduction method and a device which can realize a small-size large-capacity memory having a...
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