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Patent # Description
US-9,741,821 Two-step dummy gate formation
A method includes forming isolation regions extending into a semiconductor substrate, and recessing the isolation regions. A portion of the semiconductor...
US-9,741,820 PMOS transistor and fabrication method thereof
The disclosed subject matter provides a p-channel metal-oxide-semiconductor (PMOS) and fabrication method thereof. The PMOS transistor is fabricated by a method...
US-9,741,819 Transistor device and fabrication method
The present disclosure provides a transistor device and fabrication method thereof. A dummy gate is formed on a substrate. An interlayer dielectric layer is...
US-9,741,818 Manufacturing method of semiconductor structure for improving quality of epitaxial layers
A manufacturing method of a semiconductor structure for improving quality of an epitaxial layer is provided in the present invention. The manufacturing method...
US-9,741,817 Method for manufacturing a trench metal insulator metal capacitor
A method for manufacturing a metal insulator metal (MIM) trench capacitor, the method may include forming a cavity in an Intermetal Dielectric stack, wherein a...
US-9,741,816 Electrical device and method for manufacturing same
A method for manufacturing an electrical device is disclosed. In an embodiment, the method includes providing a first layer of a first conductivity type,...
US-9,741,815 Metal selenide and metal telluride thin films for semiconductor device applications
In some aspects, methods of forming a metal selenide or metal telluride thin film are provided. According to some methods, a metal selenide or metal telluride...
US-9,741,814 Semiconductor device with fin transistors and manufacturing method of such semiconductor device
A semiconductor device including: a first conductivity type transistor and a second conductivity type transistor, wherein each of the first conductivity type...
US-9,741,813 Pure boron for silicide contact
A semiconductor device includes a gate disposed over a substrate; a source region and a drain region on opposing sides of the gate; and a pair of trench...
US-9,741,812 Dual metal interconnect structure
Source/drain contact structures that exhibit low contact resistance and improved electromigration properties are provided. After forming a first contact...
US-9,741,811 Integrated circuit devices including source/drain extension regions and methods of forming the same
Integrated circuit devices may include a stack that includes channel regions and gate electrodes stacked in an alternating sequence in a vertical direction. The...
US-9,741,810 Strained channel of gate-all-around transistor
The disclosure relates to a semiconductor device. An exemplary structure for a nanowire structure comprises a first semiconductor material having a first...
US-9,741,809 Nonplanar device with thinned lower body portion and method of fabrication
A nonplanar semiconductor device having a semiconductor body formed on an insulating layer of a substrate. The semiconductor body has a top surface opposite a...
US-9,741,808 Split-gate trench power MOSFET with protected shield oxide
A plurality of gate trenches is formed into a semiconductor substrate in an active cell region. One or more other trenches are formed in a different region....
US-9,741,807 FinFET device with vertical silicide on recessed source/drain epitaxy regions
A method of forming a semiconductor device that includes forming a fin structure from a semiconductor substrate, and forming a gate structure on a channel...
US-9,741,805 Semiconductor device and method for manufacturing the semiconductor device
A deterioration of a gate threshold voltage, which is caused by a stress and a thermal hysteresis when wire bonding for a surface of an electrode layer of a...
US-9,741,804 Thin film transistor substrate and display panel having film layer with different thicknesses
A thin film transistor (TFT) substrate includes a substrate and a TFT. The TFT is disposed on the substrate and comprises a gate, a gate dielectric layer, a...
US-9,741,803 Nonvolatile charge trap memory device having a deuterated layer in a multi-layer charge-trapping region
A charge trap memory device is provided. In one embodiment, the charge trap memory device includes a semiconductor material structure having a vertical channel...
US-9,741,802 Semiconductor device with breakdown preventing layer
A semiconductor device with a breakdown preventing layer is provided. The breakdown preventing layer can be located in a high-voltage surface region of the...
US-9,741,801 Method for producing a semiconductor device
A method for producing a semiconductor device includes depositing an oxide film containing an impurity having a first conductivity type on a substrate. A...
US-9,741,800 III-V multi-channel FinFETs
A device includes insulation regions over portions of a semiconductor substrate, and a III-V compound semiconductor region over top surfaces of the insulation...
US-9,741,799 Silicon carbide semiconductor device and method for manufacturing the same
A silicon carbide semiconductor device includes a silicon carbide semiconductor layer, a gate insulating film formed on the silicon carbide semiconductor layer,...
US-9,741,798 Semiconductor device
According to one embodiment, a semiconductor device includes a structure, an insulating film, a control electrode, first and second electrodes. The structure...
US-9,741,797 Insulated gate silicon carbide semiconductor device and method for manufacturing same
An insulated gate silicon carbide semiconductor device includes: a drift layer of a first conductivity type on a silicon carbide substrate of 4H type with a...
US-9,741,796 Graphene-based valley filter and method for operating the same
A graphene-based valley filter includes a bottom gate, a bilayer graphene and two top gates. The bilayer graphene is deposited on the bottom gate and includes...
US-9,741,795 IGBT having at least one first type transistor cell and reduced feedback capacitance
An IGBT includes at least one first type transistor cell, including a base region, first and second emitter regions, and a body region arranged between the...
US-9,741,794 Semiconductor device and method for manufacturing semiconductor device
Provided is a semiconductor device having a structure which can prevent deterioration of the electrical characteristics, which becomes more significant with...
US-9,741,793 Semiconductor device with false drain
An electronic apparatus includes a semiconductor substrate and first and second transistors disposed in the semiconductor substrate. The first transistor...
US-9,741,792 Bulk nanosheet with dielectric isolation
Techniques for dielectric isolation in bulk nanosheet devices are provided. In one aspect, a method of forming a nanosheet device structure with dielectric...
US-9,741,791 Latchup reduction by grown orthogonal substrates
An integrated circuit is formed by providing a heavily doped substrate of a first conductivity type, forming a lightly doped lower epitaxial layer of the first...
US-9,741,790 Method for creating the high voltage complementary BJT with lateral collector on bulk substrate with resurf effect
Complementary high-voltage bipolar transistors formed in standard bulk silicon integrated circuits are disclosed. In one disclosed embodiment, collector regions...
US-9,741,788 Semiconductor device and method for fabricating the same
A semiconductor includes an N-type impurity region provided in a substrate. A P-type RESURF layer is provided at a top face of the substrate in the N-type...
US-9,741,787 Methods and apparatus for high voltage integrated circuit capacitors
High voltage integrated circuit capacitors are disclosed. In an example arrangement. A capacitor structure includes a semiconductor substrate; a bottom plate...
US-9,741,786 Semiconductor integrated circuit device having with a reservoir capacitor
A semiconductor integrated circuit device may include a through silicon via (TSV), a keep out zone and a plurality of dummy patterns. The TSV may be arranged in...
US-9,741,785 Display tile structure and tiled display
A display tile structure includes a tile layer with opposing emitter and backplane sides. A light emitter having first and second electrodes for conducting...
US-9,741,784 Organic light emitting display device and method of manufacturing the same
An organic light emitting display device includes a substrate including a plurality of pixel areas, each of the plurality of pixel areas including a light...
US-9,741,783 Display panel and organic light emitting display device comprising the same
A display panel including: a first substrate; a second substrate opposing the first substrate; a sealing substructure on the first substrate, the sealing...
US-9,741,782 Active matrix organic light-emitting display and display apparatus
An AMOLED comprises a plurality of pixel structures arranged in a matrix and one layer of power supply signal electrode configured to provide a power supply...
US-9,741,781 Optoelectronic component with adjustable light emission and method for producing the same
Various embodiments may relate to an optoelectronic component, including an optoelectronic structure, which is designed to provide a first electromagnetic...
US-9,741,780 Organic light-emitting diode display
An organic light-emitting diode (OLED) display is disclosed. In one aspect, the display includes a substrate including a display area configured to display an...
US-9,741,779 Oxide semiconductor device
One object is to provide a semiconductor device with a structure which enables reduction in parasitic capacitance sufficiently between wirings. In a bottom-gate...
US-9,741,778 Organic light-emitting diode (OLED) display
An organic light-emitting diode (OLED) display is disclosed. In one aspect, the OLED display includes a thin film transistor comprising an active layer, a gate...
US-9,741,777 Bottom-emitting OLED display panel
A bottom-emitting OLED display panel is provided. The bottom-emitting OLED display panel includes: a driving transistor disposed on a substrate; a protective...
US-9,741,776 Manufacturing method for organic light emitting diode display and organic light emitting diode display using...
A method for manufacturing an organic light emitting diode display includes forming a thin-film transistor on a substrate, forming a protection layer by using a...
US-9,741,775 Display device
A display device includes a plurality of pixels on a substrate including an insulating surface. Each of the plurality of pixels includes: a transistor above the...
US-9,741,773 Organic light-emitting display apparatus
An organic light-emitting display apparatus includes a display area including first and second pixels. A plurality of photo sensors is arranged in an outer area...
US-9,741,772 Display device comprising bending sensor
A display device including a bending sensor is provided. A display device including a bending sensor may include a flexible substrate including a display area...
US-9,741,771 Method for manufacturing organic light emitting diode display
A manufacturing method of an organic light emitting device may include the following. A panel displaying an image is formed. A buffering member including a...
US-9,741,770 Organic light emitting diode display
An organic light emitting diode display includes a substrate, a transistor on the substrate, a reflecting electrode connected to the transistor, a color filter...
US-9,741,769 Vertical memory structure with array interconnects and method for producing the same
Disclosed herein is a method and apparatus for fabricating a memory device. The memory device has a vertical stack of alternating layers of conductive and...
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