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Patent # Description
US-9,755,223 Treatment process for a positive electrode active material for lithium-ion secondary battery
In a treatment process for a positive electrode active material for a lithium-ion secondary battery, Li compounds such as Li.sub.2CO.sub.3, LiOH, and the like,...
US-9,755,222 Alkali metal oxyanion electrode material having a carbon deposited by pyrolysis and process for making same
An alkali metal oxyanion cathode material comprising particles, where the particles carry, on at least a portion of the particle surface, carbon deposit by...
US-9,755,221 Co-extruded conformal battery separator and electrode
A co-extrusion print head has at least one separator inlet port, at least a first, second and third series of channels arranged to receive a separator material...
US-9,755,208 Non-aqueous-secondary-battery separator and non-aqueous secondary battery
Provided is a non-aqueous-secondary-battery separator including: a microporous membrane; and an adhesive porous layer which is provided on one or both surfaces...
US-9,755,184 Display panel and method of fabricating the same
A display panel includes a thin film transistor substrate and a display layer disposed on the thin film transistor substrate and having a display. The thin film...
US-9,755,162 Organic light emitting device and display device
An organic light emitting device and a display device is provided. The organic light emitting device includes an anode, a cathode, and a light emitting layer...
US-9,755,155 Organic compounds containing squaric acid or croconic acid moieties for application in electronic devices
A compound containing a squaric acid or a croconic acid group as an anchoring group. The compound containing a squaric acid or a croconic acid group has formula...
US-9,755,148 Peeling method and method of manufacturing semiconductor device
There is provided a peeling method capable of preventing a damage to a layer to be peeled. Thus, not only a layer to be peeled having a small area but also a...
US-9,755,132 Thermoelectric generation unit and thermoelectric generation system
A thermoelectric generation unit according to the present disclosure includes a plurality of thermoelectric generation tubes. Each tube has a flow path defined...
US-9,755,131 Athletic activity monitoring device with energy capture
Aspects relate to an energy harvesting device adapted for use by an athlete while exercising. The device may utilize a mass of phase-change material to store...
US-9,755,118 Light-emitting device, method for designing light-emitting device, method for driving light-emitting device,...
An object of the present invention is to provide a light-emitting device that can implement a natural, vivid, highly visible and comfortable appearance of...
US-9,755,116 Method of manufacturing light emitting device
A method of manufacturing a light emitting device includes providing a package; disposing a light emitting element in a recess of the package; injecting a...
US-9,755,114 Method for producing a plurality of optoelectronic components and optoelectronic component
The invention relates to a method for producing a plurality of optoelectronic components, comprising the following steps: --providing an auxiliary support wafer...
US-9,755,101 Group 13 selenide nanoparticles
A method of preparing Group XIII selenide nanoparticles comprises reacting a Group XIII ion source with a selenol compound. The nanoparticles have an...
US-9,755,095 Method and structure for multicell devices without physical isolation
The present technology relates to multi-cell devices fabricated on a common substrate that are more desirable than single cell devices, particularly in...
US-9,755,094 Imaging device
To provide an imaging device equipped with a photodiode, which is capable of enhancing both of a capacity and sensitivity. In an area of a P-type well in which...
US-9,755,092 Optical device including two-dimensional material and method of manufacturing the same
An optical device including a two-dimensional material and a method of manufacturing the same are provided. The optical device may include a barrier stack...
US-9,755,088 Solar cell manufacturing method
In a method for manufacturing a solar cell, a first electrode is formed on one surface of a photoelectric conversion section by means of screen printing using a...
US-9,755,084 Multi-level stacked transistor device including capacitor and different semiconductor materials
A semiconductor device having a novel structure is provided in which a transistor including an oxide semiconductor and a transistor including a semiconductor...
US-9,755,072 High voltage device fabricated using low-voltage processes
A method for fabricating a high-voltage transistor on a semiconductor substrate includes defining and forming shallow trench isolation regions for all of the...
US-9,755,062 III-N material structure for gate-recessed transistors
III-N transistors with recessed gates. An epitaxial stack includes a doped III-N source/drain layer and a III-N etch stop layer disposed between a the...
US-9,755,051 Embedded shape sige for strained channel transistors
An integrated circuit die includes a silicon substrate. PMOS and NMOS transistors are formed on the silicon substrate. The carrier mobilities of the PMOS and...
US-9,755,040 Semiconductor wafer, method of producing semiconductor wafer and electronic device
To provide a semiconductor wafer having a wafer, a compound semiconductor layer, a first insulating layer and a second insulating layer, wherein in the depth...
US-9,755,033 Semiconductor device and method of forming vertical structure
According to an exemplary embodiment, a method of forming a vertical structure is provided. The method includes the following operations: providing a substrate;...
US-9,755,024 Functionalized ZnO or ZnO alloy films exhibiting high electron mobility
Functionalized films are provided comprising a film of ZnO or ZnO alloy disposed over a supporting substrate and a layer of organic molecules comprising...
US-9,755,019 Semiconductor device and manufacturing method thereof
A semiconductor device includes an isolation layer, first and second fin structures, a gate structure and a source/drain structure. The isolation layer is...
US-9,755,014 Semiconductor device with substantially equal impurity concentration JTE regions in a vicinity of a junction depth
A highly reliable semiconductor device with high withstand voltage is provided. As means therefor, an impurity concentration in a first JTE region is set to...
US-9,755,004 Full-color active matrix organic light emitting display with hybrid structure
A full-color AM OLED includes a transparent substrate, a color filter positioned on an upper surface of the substrate, and a metal oxide thin film transistor...
US-9,755,001 Light-emitting device comprising films having different optical path lengths
A light-emitting device includes a first light-emitting element emitting blue light, a second light-emitting element emitting green light, and a third...
US-9,754,979 Display device, thin film transistor, array substrate and manufacturing method thereof
The embodiments of the invention provide a display device, a thin film transistor, an array substrate and a manufacturing method thereof. The manufacturing...
US-9,754,972 Metal oxide film and method for forming metal oxide film
A metal oxide film including a crystal part and having highly stable physical properties is provided. The size of the crystal part is less than or equal to 10...
US-9,754,968 Structure and method to form III-V, Ge and SiGe fins on insulator
A method provides a first substrate supporting an insulator layer having trenches formed therein; filling the trenches using an epitaxial growth process with at...
US-9,754,956 Uniform thickness blocking dielectric portions in a three-dimensional memory structure
A memory opening is formed through a stack of alternating layers comprising first material layers and second material layers. Sidewall surfaces of the second...
US-9,754,953 Charge storage apparatus and methods
Methods of forming multi-tiered semiconductor devices are described, along with apparatus and systems that include them. In one such method, an opening is...
US-9,754,950 Semiconductor device including transistor having offset insulating layers
A semiconductor device includes a substrate having a memory array region and a peripheral region, isolation layers formed in the peripheral region to define an...
US-9,754,944 Method of manufacturing semiconductor device
Provided is a method of manufacturing a semiconductor device. The method includes forming isolated contact filling portions and an etch control portion, the...
US-9,754,940 Self-aligned contact metallization for reduced contact resistance
Techniques are disclosed for forming low contact resistance transistor devices. A p-type germanium layer is provided between p-type source/drain regions and...
US-9,754,925 3DIC interconnect apparatus and method
An interconnect apparatus and a method of forming the interconnect apparatus is provided. Two integrated circuits are bonded together. A first opening is formed...
US-9,754,920 Semiconductor device
The reliability of a semiconductor device is improved. A semiconductor device in accordance with one embodiment has a plurality of stacked semiconductor chips....
US-9,754,902 Backside fib probing detector in a forward and reverse body biasing architecture
An integrated circuit including a plurality of first semiconductor strips of a first conductivity type and of second semiconductor strips of a second...
US-9,754,883 Hybrid metal interconnects with a bamboo grain microstructure
A method of forming an interconnect with a bamboo grain microstructure. The method includes forming a conductive filler layer in a trench of an insulating layer...
US-9,754,867 Semiconductor device and method of forming repassivation layer for robust low cost fan-out semiconductor package
A semiconductor device comprises a semiconductor die including a conductive layer. A first insulating layer is formed over the semiconductor die and conductive...
US-9,754,857 Folded fin heat transfer device
A system for cooling a heat producing device is provided. The system can include an air mover (110) wherein at least a portion of the discharge airflow (115) is...
US-9,754,851 Electronic device provided with an integrated conductor element and fabrication method
An electronic device includes a support plate having a mounting face and an electrical connection network. An integrated circuit chip is mounted on the mounting...
US-9,754,844 Double sided NMOS/PMOS structure and methods of forming the same
A chip includes a dielectric layer having a top surface and a bottom surface, a first semiconductor layer overlying and bonded to the top surface of the...
US-9,754,840 Horizontal gate-all-around device having wrapped-around source and drain
A method of forming a semiconductor device includes forming a fin extending from a substrate. The fin has a source/drain (S/D) region and a channel region. The...
US-9,754,826 Semiconductor devices and methods of manufacturing the same
A semiconductor device includes a metal pattern filling a trench formed through at least a portion of an insulating interlayer on a substrate and including...
US-9,754,819 Interlevel airgap dielectric
A method of forming a semiconductor device includes: forming a lower trace in a lower dielectric layer; reducing a height of the lower trace a distance equal to...
US-9,754,812 Adaptable end effector
An adaptable end effector may include a substrate interface may be configured to support a substrate. The substrate interface may include multiple groups of...
US-9,754,796 Hard mask removal scheme
A method for hard mask layer removal includes dispensing a chemical on a hard mask layer, in which the chemical includes an acidic chemical. The chemical is...
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