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Patent # Description
US-9,761,474 Methods for processing semiconductor devices
Methods of forming semiconductor structures include providing a polymeric material over a carrier substrate, bonding another substrate to the polymeric...
US-9,761,473 Substrate supporting unit and substrate processing apparatus manufacturing method of the substrate supporting unit
Provided are a substrate supporting unit and a substrate processing apparatus, and a method of manufacturing the substrate supporting unit. The substrate...
US-9,761,472 Container opening/closing device
The present invention provides a container opening/closing device for opening and closing a lid of a container. The container comprises a container body...
US-9,761,471 Manufacturing line for semiconductor device and method of manufacturing semiconductor device
A manufacturing line for a semiconductor device according to the invention is a manufacturing line for manufacturing a semiconductor device by circulating a...
US-9,761,470 Wafer carrier
A wafer carrier 1 includes a lower unit 2 on which a semiconductor wafer 100 is placed, and an upper unit 3 detachably attached to the lower unit 2, and forming...
US-9,761,469 Unloading mechanism
An unloading mechanism for removing workpieces from a transporting film can include a bottom plate, a picking assembly, and a storage assembly. The picking...
US-9,761,468 Device and method for wafer taping
In accordance with some embodiments, a wafer taping device is provided. The wafer taping device includes a tape delivering along a first direction. The wafer...
US-9,761,467 Gas injection system with precursor for planar deprocessing of semiconductor devices using a focused ion beam
A method and system for improved planar deprocessing of semiconductor devices using a focused ion beam system. The method comprises defining a target area to be...
US-9,761,466 Apparatus and method for cleaning semiconductor substrate
A cleaning apparatus for a semiconductor substrate includes a belt conveyor, a treatment head that executes cleaning, rinsing and drying treatments, a rinse...
US-9,761,465 Systems and methods for mechanical and electrical package substrate issue mitigation
Systems and methods are provided for an integrated circuit package. A plurality of electrical contacts are configured to provide a structure for electrically...
US-9,761,464 Power MOSFET and manufacturing method thereof
A power MOSFET includes a substrate, a dielectric layer, solder balls, first and second patterned-metal layers. The substrate includes an active surface, a back...
US-9,761,463 Semiconductor device and semiconductor device manufacturing method
According to embodiments, a semiconductor device is provided. The semiconductor device includes an insulation layer, an electrode, and a groove. The insulation...
US-9,761,462 Resin package with a groove for an embedded internal lead
A semiconductor device includes an external lead-out terminal having an external terminal and an internal terminal connected to a connecting portion of the...
US-9,761,461 Systems and methods for fabricating a polycrystaline semiconductor resistor on a semiconductor substrate
In accordance with embodiments of the present disclosure, an integrated circuit may include at least one region of shallow-trench isolation field oxide, at...
US-9,761,460 Method of fabricating semiconductor structure
A method of fabricating a semiconductor structure is provided and includes the following steps. A semiconductor substrate including fin structures is provided....
US-9,761,459 Systems and methods for reverse pulsing
Systems and methods for reverse pulsing are described. One of the methods includes receiving a digital signal having a first state and a second state. The...
US-9,761,458 Apparatus and method for reactive ion etching
The invention relates to an apparatus for reactive ion etching of a substrate, comprising: a plasma etch zone including an etch gas supply and arranged with a...
US-9,761,457 Pitch reduction technology using alternating spacer depositions during the formation of a semiconductor device...
A method for patterning a layer increases the density of features formed over an initial patterning layer using a series of self-aligned spacers. A layer to be...
US-9,761,456 Method of manufacturing semiconductor device and substrate processing apparatus
A method of manufacturing a semiconductor device includes (a) providing a substrate and (b) forming a film including a first element, a second element and a...
US-9,761,455 Material removal process for self-aligned contacts
A method is disclosed of removing a first material disposed over a second material adjacent to a field effect transistor gate having a gate sidewall layer that...
US-9,761,454 Method of polishing SiC substrate
A method of polishing a SiC substrate by supplying a polishing liquid and bringing a polishing pad into contact with the SiC substrate is provided. The...
US-9,761,453 Method for manufacturing a silicon carbide semiconductor element
An ion implantation mask, which is an inorganic insulating film, is formed on a silicon carbide substrate. A mask portion and two regions of an opened ion...
US-9,761,452 Devices and methods of forming SADP on SRAM and SAQP on logic
Devices and methods of fabricating integrated circuit devices with reduced cell height are provided. One method includes, for instance: obtaining an...
US-9,761,451 Cut last self-aligned litho-etch patterning
The present disclosure relates to a method of performing a semiconductor fabrication process. In some embodiments, the method is performed by forming a spacer...
US-9,761,450 Forming a fin cut in a hardmask
A method of fabricating a hard mask structure is provided. According to the method, a hard mask layer is disposed over a substrate. The hard mask layer includes...
US-9,761,449 Gap filling materials and methods
In accordance with an embodiment a bottom anti-reflective layer comprises a surface energy modification group which modifies the surface energy of the polymer...
US-9,761,448 Method for manufacturing LTPS TFT substrate structure and structure of LTPS TFT substrate
The present invention provides a method for manufacturing an LTPS TFT substrate structure and a structure of an LTPS TFT substrate. The method for manufacturing...
US-9,761,447 Method for manufacturing TFT substrate and TFT substrate manufactured thereof
The invention provides a method for manufacturing a TFT substrate and a TFT substrate manufactured thereof. In the above TFT substrate, the low temperature...
US-9,761,446 Methods for the synthesis of arrays of thin crystal grains of layered semiconductors SnS2 and SnS at designed...
Methods of producing arrays of thin crystal grains of layered semiconductors, including the creation of stable atomic-layer-thick to micron-thick membranes of...
US-9,761,445 Methods and structures for forming microstrip transmission lines on thin silicon carbide on insulator (SICOI)...
A method for providing a semiconductor structure includes: providing a structure having: layer comprising silicon, such as a layer of silicon or silicon...
US-9,761,444 Methods and devices for fabricating and assembling printable semiconductor elements
The invention provides methods and devices for fabricating printable semiconductor elements and assembling printable semiconductor elements onto substrate...
US-9,761,443 Method for passivating surfaces, functionalizing inert surfaces, layers and devices including same
The invention provides a method for passivation of various surfaces (metal, polymer, semiconductors) from external contaminants, and the functionalization of...
US-9,761,442 Protective film forming method for forming a protective film on a wafer
A method for forming a water-soluble resin film on a wafer having a plurality of devices thereon. The wafer is supported through an adhesive tape to an annular...
US-9,761,441 Physical vapor deposition methods and systems to form semiconductor films using counterbalance magnetic field...
Embodiments relate generally to semiconductor device fabrication and processes, and more particularly, to systems and methods that implement magnetic field...
US-9,761,440 Surface passivation on indium-based materials
The present disclosure provides a semiconductor structure in accordance with some embodiments. The semiconductor structure includes a semiconductor feature, a...
US-9,761,439 PECVD protective layers for semiconductor devices
A semiconductor device includes a plasma-enhanced chemical vapor deposition (PECVD) protective layer configured to prevent failure of the semiconductor device...
US-9,761,438 Method for manufacturing a semiconductor structure having a passivated III-nitride layer
A semiconductor structure comprising a layer of a III-N material and at least a portion of said layer being covered by a passivation layer, wherein the...
US-9,761,437 Method of manufacturing semiconductor device, substrate processing method and substrate processing apparatus
Provided are: forming an oxycarbonitride film, an oxycarbide film or an oxide film on a substrate by alternately performing a specific number of times: forming...
US-9,761,436 Mechanisms for forming patterns using multiple lithography processes
The present disclosure provides a method for forming patterns in a semiconductor device. The method includes providing a substrate and a patterning-target layer...
US-9,761,435 Flip chip cavity package
A process for forming a semiconductor package. The process comprises forming a first leadframe strip mounted upon an adhesive tape. The first leadframe strip is...
US-9,761,434 Lamp with intertwined stranded power lead
A lamp (10) is formed of a lamp capsule (1) sealed with a press seal (2) penetrated by electrical lead-ins (12), the lamp (1) being received in an insulating...
US-9,761,433 Compact air-cavity electrodeless high intensity discharge lamp with coupling sleeve
A novel compact air-cavity electrodeless high intensity discharge lamp is disclosed that provides added flexibility in its design to improve performance and...
US-9,761,432 Tandem quadrupole mass spectrometer
A dwell time calculation table (51a) showing a correspondence relation between a CID gas pressure inside a collision cell (31) and a dwell time for data...
US-9,761,431 System and methodology for expressing ion path in a time-of-flight mass spectrometer
A system for expressing an ion path in a time-of-flight (TOF) mass spectrometer. The present invention uses two successive curved sectors, with the second one...
US-9,761,430 Fragment ion mass spectra measured with tandem time-of-flight mass spectrometers
The present invention provides a method for acquiring fragment ion mass spectra with a time-of-flight mass spectrometer, whereby mixed mass spectra with...
US-9,761,428 Multi inlet for solvent assisted inlet ionisation
A mass spectrometer is disclosed comprising a dual channel Solvent Assisted Inlet Ionization ("SAII") interface.
US-9,761,427 System for transferring ions in a mass spectrometer
A system for transporting ions includes: an ion transfer tube having an axis and an internal bore having a width and a height less than the width; and an...
US-9,761,426 Synchronization of ion generation with cycling of a discontinuous atmospheric interface
The invention generally relates to methods and devices for synchronization of ion generation with cycling of a discontinuous atmospheric interface. In certain...
US-9,761,425 Method of charge reduction of electron transfer dissociation product ions
A mass spectrometer is disclosed wherein highly charged fragment ions resulting from Electron Transfer Dissociation fragmentation of parent ions are reduced in...
US-9,761,424 Filtered cathodic arc method, apparatus and applications thereof
An apparatus for generating energetic particles and application of coatings in a vacuum comprising a plasma duct surrounded by a magnetic deflecting and...
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