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Patent # Description
US-9,793,386 Multiple zone power semiconductor device
A power semiconductor device is comprised of a plurality of zones having similar structure. Each of the zones may be characterized by a switching loss during...
US-9,793,385 Insulated gate bipolar transistor structure having low substrate leakage
A high voltage metal-oxide-semiconductor laterally diffused device (HV LDMOS), and more particularly an insulated gate bipolar junction transistor (IGBT), is...
US-9,793,384 Tunneling field effect transistor and methods of making such a transistor
One illustrative method of forming a TFET device includes forming a first semiconductor material that extends for a full length of a drain region, a gate region...
US-9,793,383 Manufacturing method of semiconductor device
A transistor with superior electric characteristics is manufactured. An oxide insulating film is formed over a substrate, an oxide semiconductor film is formed...
US-9,793,382 Manufacturing method of semiconductor device
A semiconductor device and a method of manufacturing the same, the semiconductor device includes a fin shaped structure, a gate structure, an epitaxial layer, a...
US-9,793,381 Method for manufacturing a semiconductor device
A method for manufacturing a semiconductor device includes forming a fin structure extending in a first direction on a substrate, forming a sacrificial gate...
US-9,793,380 Semiconductor structure and fabrication method thereof
A method for making a semiconductor device. A substrate having a fin structure is provided. A continuous dummy gate line is formed on the substrate. The dummy...
US-9,793,379 FinFET spacer without substrate gouging or spacer foot
The present invention relates generally to semiconductor devices, and more particularly, to a structure and method of forming a spacer adjacent to a gate in a...
US-9,793,378 Fin field effect transistor device with reduced overlap capacitance and enhanced mechanical stability
Improved fin field effect transistor (FinFET) devices and methods for fabrication thereof. In one aspect, a method for fabricating a FinFET device comprises: a...
US-9,793,377 Thin film transistor, thin film transistor array panel including the same, and manufacturing method thereof
The present invention relates to a thin film transistor, a thin film transistor array panel, and a manufacturing method thereof. A thin film transistor...
US-9,793,376 Silicon carbide semiconductor device and method of manufacturing the same
In a method of manufacturing a silicon carbide semiconductor device including a vertical switching element having a trench gate structure, with the use of a...
US-9,793,375 High voltage lateral DMOS transistor with optimized source-side blocking capability
An integrated circuit and method having an extended drain MOS transistor with a buried drift region, a drain diffused link, a channel diffused link, and an...
US-9,793,374 Vertical transistor fabrication and devices
A method of fabricating a vertical field effect transistor including forming a first recess in a substrate; epitaxially growing a first drain from the first...
US-9,793,373 Field effect transistor structure with abrupt source/drain junctions
Microelectronic structures embodying the present invention include a field effect transistor (FET) having highly conductive source/drain extensions. Formation...
US-9,793,372 Integrated circuit including a dummy gate structure and method for the formation thereof
An integrated circuit includes a first transistor, a second transistor and a dummy gate structure. The first transistor includes a first gate structure. The...
US-9,793,371 Method of forming a high electron mobility transistor
A method of forming a high electron mobility transistor (HEMT) includes forming a second III-V compound layer on a first III-V compound layer, forming a source...
US-9,793,370 Transistor with oxidized cap layer
A semiconductor device includes a substrate, a channel layer, a spacer layer, a barrier layer, and an oxidized cap layer. The channel layer is disposed on or...
US-9,793,369 MIS-type semiconductor device
The present invention provides a MIS-type semiconductor device having a ZrO.sub.xN.sub.y gate insulating film in which threshold voltage shift is suppressed,...
US-9,793,368 Semiconductor devices including a rare earth element and methods of forming semiconductor devices including a...
Semiconductor devices are provided. A semiconductor device includes an insulating layer. The semiconductor device includes a rare earth element supply layer on...
US-9,793,367 Ohmic contact to semiconductor
An ohmic contact to a semiconductor layer including a heterostructure barrier layer and a metal layer adjacent to the heterostructure barrier layer is provided....
US-9,793,366 Array substrate, method of fabricating the same, display panel and display device
An array substrate, a method for fabricating the same, a display panel and a display device are disclosed. The array substrate comprises a display area and a...
US-9,793,365 Method for manufacturing silicon carbide semiconductor device having trench
A trench having an opening and a corner portion is formed in a silicon carbide substrate. A corner insulating film is formed to cover the corner portion. A gate...
US-9,793,364 Substrate contact having substantially straight sidewalls to a top surface of the substrate
A semiconductor device with a deep trench has a dielectric liner formed on sidewalls and a bottom of the deep trench. A pre-etch deposition step of a two-step...
US-9,793,363 GaN semiconductor device comprising carbon and iron
A semiconductor device includes: a substrate; a first GaN layer on the substrate and containing carbon; a second GaN layer on the first GaN layer and containing...
US-9,793,362 Semiconductor device having an impurity concentration and method of manufacturing thereof
A method of manufacturing a semiconductor device includes irradiating the semiconductor body with particles through a first side of the semiconductor body,...
US-9,793,361 Thin film transistor, array substrate and display device
A thin film transistor, an array substrate and a display device are disclosed, the thin film transistor comprises a gate electrode, an active layer located on...
US-9,793,360 Methods of fabricating semiconductor structures or devices using layers of semiconductor material having...
Methods of fabricating semiconductor devices or structures include bonding a layer of semiconductor material to another material at a temperature, and...
US-9,793,359 Semiconductor thin film structure and method of forming the same
A method of forming a semiconductor thin film structure and a semiconductor thin film structure formed using the same is provided. A sacrificial layer is formed...
US-9,793,358 Non-planar semiconductor device with multiple-head epitaxial structure on fin
A non-planar semiconductor structure includes raised semiconductor structures, e.g., fins, having epitaxial structures grown on top surfaces thereof, for...
US-9,793,357 Semiconductor device and method of manufacturing the same
A semiconductor device includes first, second, third, and fourth electrodes, a first insulating film, and first, second third, and fourth silicon carbide...
US-9,793,356 Semiconductor device and method for fabricating the same
A semiconductor device may have a structure that prevents or reduces an etching amount of certain portions, such as a part of a source/drain region. Adjacent...
US-9,793,355 Epitaxial wafer and switch element and light-emitting element using same
An epitaxial wafer comprises an epitaxial layer disposed on a substrate. The epitaxial layer comprises first to third semiconductor layers. The third...
US-9,793,354 Semiconductor device and method of manufacturing the same
A semiconductor device according to an embodiment includes: a first electrode; a SiC semiconductor layer including n-type semiconductor; and a second electrode...
US-9,793,353 Multiple layer quantum well FET with a side-gate
An exemplary FET includes a substrate and multiple vertically stacked layer groups with each layer group having a quantum well semiconductive layer and a...
US-9,793,352 IGBT assembly having saturable inductor for soft landing a diode recovery current
A combination switch includes an Insulated Gate Bipolar Transistor (IGBT), an anti-parallel diode, and a saturable inductor. The diode and inductor are coupled...
US-9,793,351 Tunnelling field effect transistor
A tunneling field effect transistor, comprising a gate electrode layer, a gate dielectric layer, a source region, a connected region and a drain region, wherein...
US-9,793,350 Multiple layer side-gate FET switch
An exemplary FET includes a base and first and second stacked layer groups each having a nonconductive layer and a semiconductive layer adjacent the...
US-9,793,349 Vertical single electron transistor formed by condensation
A method for forming a vertical single electron transistor includes forming a heterostructured nanowire having a SiGe region centrally disposed between an upper...
US-9,793,348 Method of manufacturing a semiconductor device with an isolation region and a device manufactured by the method
A method of manufacturing a semiconductor device includes forming trench isolation structures, exposing some of the trench isolation structures 28 to leave...
US-9,793,347 Semiconductor device and method of fabricating the same
A semiconductor device includes a substrate, a conductive pattern, a side spacer, and an air gap. The substrate includes an interlayer insulating layer and a...
US-9,793,346 Semiconductor device with threshold MOSFET for high voltage termination
This invention discloses a semiconductor power device disposed in a semiconductor substrate comprising a lightly doped layer formed on a heavily doped layer and...
US-9,793,345 Semiconductor device
A semiconductor device is disclosed, including a plurality of gate rings formed on a substrate and concentrically surrounding a first doped region formed in the...
US-9,793,344 Semiconductor device and method of manufacturing the same
According to one embodiment, a semiconductor device comprises a first semiconductor region of a first conductivity type, a second semiconductor region of a...
US-9,793,343 Semiconductor device
To improve withstand capability of a semiconductor device during reverse recovery, provided is a semiconductor device including a semiconductor substrate having...
US-9,793,342 Insulated gate type semiconductor device and method for fabricating the same
In an insulated-gate type semiconductor device in which a gate-purpose conductive layer is embedded into a trench which is formed in a semiconductor substrate,...
US-9,793,341 Deep trench capacitor with metal plate
The present disclosure generally relates to semiconductor structures and, more particularly, to a deep trench capacitor, integrated structures and methods of...
US-9,793,340 Capacitor structure
The invention relates to a capacitor structure (2) comprising a silicon substrate (4) with first and second sides (6, 8), a double double Metal Insulator Metal...
US-9,793,339 Method for preventing copper contamination in metal-insulator-metal (MIM) capacitors
The present disclosure relates to a MIM capacitor that includes a composite capacitor top metal (CTM) electrode and a composite capacitor bottom metal (CBM)...
US-9,793,337 Integrated circuits and fabrication methods thereof
An integrated circuit includes a first polysilicon region having a first grain size formed on a substrate. The integrated circuit also includes a second...
US-9,793,336 High resistivity iron-based, thermally stable magnetic material for on-chip integrated inductors
An on-chip magnetic structure includes a palladium activated seed layer and a substantially amorphous magnetic material disposed onto the palladium activated...
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