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Patent # Description
US-9,866,251 Gesture detection to pair two wearable devices and perform an action between them and a wearable device, a...
The present disclosure relates to devices and methods for initiating execution of actions and for communicating information to a user, and more particularly, to...
US-9,866,250 Adaptive maximum power limiting using capacitive sensing in a wireless device
An apparatus for satisfying Specific Absorption Rate (SAR) compliance criteria including a first capacitance sensor, a second capacitance sensor, a memory, and...
US-9,866,249 Card holding member and card connector
The card holding member is able to hold a card including terminal members and is able to be inserted into a card connector, and comprises a frame portion...
US-9,866,248 Method for verifying location information of a terminal connected to a cellular telecommunications network
A method for verifying location information of a terminal equipped with a UICC card, connected to a cellular telecommunications network and located in a current...
US-9,866,247 Communications devices, infrastructure equipment and methods
A communications device including a receiver configured to receive a plurality of sub-units of an encoded transport block of data in a plurality of time-divided...
US-9,866,246 Digital Transmitter channel optimization device
A digital transmitter channel optimization device can be employed within or in conjunction with a transmitter to perform a number of techniques in the digital...
US-9,866,245 Active differential resistors with reduced noise
A method and system of providing an active differential resistor. The active differential resistor includes a diode having a first node and a second node. There...
US-9,866,244 Electromagnetic couplers for multi-frequency power detection
Multi-output electromagnetic couplers configured to detect multiple frequencies simultaneously, and devices and systems including same. In one example a...
US-9,866,243 Forward error correction codeword synchronization method, device, and system
Embodiments of the present invention provide a forward error correction codeword synchronization method, device, and system. The method is: sending, by a...
US-9,866,242 Throughput optimization for redundancy coded data storage systems
Techniques described and suggested herein include systems and methods for optimizing throughput characteristics for data archives stored on data storage systems...
US-9,866,241 Techniques for adaptive LDPC decoding
Techniques are described for an adaptive low density parity check (LDPC) decoder. The techniques include receiving a first set of values corresponding to a...
US-9,866,240 Map algorithm-based turbo decoding method and apparatus, and computer storage medium
An MAP algorithm-based Turbo decoding method and apparatus. The method includes: iteratively estimating an information symbol by using an MAP algorithm,...
US-9,866,239 Method and system for bi-phase mark coding (BMC) decoding
Embodiments of methods and systems for BMC decoding are described. In an embodiment, a method for BMC decoding involves performing a unit interval estimation of...
US-9,866,238 Incremental analog to digital converter with efficient residue conversion
An incremental analog to digital converter for digitizing an analog voltage including an M.sup.th order delta sigma modulator, an M.sup.th order digital...
US-9,866,237 Low power switched capacitor integrator, analog-to-digital converter and switched capacitor amplifier
Disclosed examples include switched capacitor integrator circuits including an amplifier, a feedback capacitor, a sampling capacitor, a loading capacitor and a...
US-9,866,236 Appapatus and method for fast conversion, compact, ultra low power, wide supply range auxiliary digital to...
A data converter includes a single-end capacitive digital to analog converter (DAC); a transconductance (GM) buffer having an output, a positive input coupled...
US-9,866,235 Digital to analog converter
Digital to analog converters have first and second to analog arrays. The first digital to analog array has a reference input, a reference output, a first...
US-9,866,234 Digital-to-analog converter
Certain aspects of the present disclosure provide digital-to-analog converters (DACs). One example DAC generally includes a first transistor configured to...
US-9,866,233 Circuit and method for generating reference signals for hybrid analog-to-digital convertors
An embodiment circuit includes a first reference source configured to provide a first reference signal to an analog-to-digital convertor (ADC). The circuit also...
US-9,866,232 Analog-to-digital converter, radiation detector and wireless receiver
According to an embodiment, an analog-to-digital converter includes a detection circuit, a first conversion circuit, a second comparator, a delay control...
US-9,866,231 Interleaved successive approximation register analog to digital converter
In an example, the present invention provides an analog to digital converter device for a high speed data transmission from 1 GS-s to 100 GS-s, although there...
US-9,866,230 Method and apparatus for calibration of a time interleaved ADC
Systems and methods for converting analog signals to digital signals. A reference slice is associated with each of a plurality of active slices to balance the...
US-9,866,229 Power adapter and control method thereof
A power adapter includes a power converting circuit, a connecting terminal and a controller. The power converting circuit is used to convert an input voltage to...
US-9,866,228 Background calibration of interleave timing errors in time-interleaved analog to digital converters
A method for performing background calibration of interleave timing errors in N order Time-Interleaved Analog to Digital Converters (TIADCs), according to which...
US-9,866,227 Sigma-delta analog-to-digital converter including loop filter having components for feedback digital-to-analog...
Some embodiments include apparatus and methods using an integrator in a loop filter of a sigma-delta analog-to-digital converter (ADC), a digital-to-analog...
US-9,866,226 Analog-to-digital conversion with noise injection via wavefront multiplexing techniques
An analog-to-digital conversion system includes a first processor, a bank of N analog-to-digital converters, and a second processor. The first processor...
US-9,866,225 Digital phase-locked loop supply voltage control
Some embodiments include apparatuses and methods having a digitally controlled oscillator (DCO) in a digital phase-locked loop (PLL) and a control loop. The DCO...
US-9,866,224 Oscillator, radio communication device, and radio communication method
An oscillator has an oscillator which comprises a first variable capacitor to adjust capacitance based on a first signal and a second variable capacitor to...
US-9,866,223 Clock recovery circuit, related clock and data recovery circuit, receiver, integrated circuit and method
A clock recovery circuit includes an oscillator to generate a clock signal. The oscillator varies a frequency of the clock signal as a function of a control...
US-9,866,222 System and method for synchronizing multiple oscillators using reduced frequency signaling
An embodiment method for voltage-controlled oscillator (VCO) control includes detecting a first VCO output signal of a first VCO. The first VCO output signal...
US-9,866,221 Test circuit to isolate HCI degradation
Embodiments are directed to a system for synchronizing switching events. The system includes a controller, a clock generator communicatively coupled to the...
US-9,866,220 Timing device
A timing method and a timing device are disclosed. A Gray code count output may be obtained by performing a Gray code count on a basic clock. Then m number of...
US-9,866,219 Device for logic operation
An arithmetic logic operation device including a memory device configured to store a lookup table and receive an input of a bit string N bits long, N being an...
US-9,866,218 Boolean logic in a state machine lattice
Disclosed are methods and devices, among which is a device that includes a finite state machine lattice. The lattice may includes a programmable Boolean logic...
US-9,866,217 Voltage level shift circuit for multiple voltage integrated circuits
A voltage level shift circuit comprises a first pair of transistors and a second pair of transistors. A first transistor of the second pair of transistors is...
US-9,866,216 Biasing circuit for level shifter with isolation
A circuit includes a biasing circuit that includes a diode stack coupled to a first node. The biasing circuit can output a biasing signal on the first node. The...
US-9,866,215 High speed low current voltage comparator
In one embodiment, a voltage comparator circuit includes a first comparator circuit to compare a first voltage and a second voltage and a second comparator...
US-9,866,214 Composite device and switching power supply
This invention provides a composite device and a switching power supply. The composite device integrates therein a first enhancement-mode MOS device and a...
US-9,866,213 High voltage switch module
A high-voltage switch module, such as a cascode module, includes an electrically insulating heatsink with a patterned conductor layer on which high-voltage and...
US-9,866,212 Tuning capacitance to enhance FET stack voltage withstand
An RF switch to controllably withstand an applied RF voltage Vsw, or a method of fabricating such a switch, which includes a string of series-connected...
US-9,866,211 Protection device for a semiconductor switch, and method for operating a protection device for a semiconductor...
The invention relates to a surge protection device for a semiconductor switch with an improved response behavior. The protection device comprises a dynamic...
US-9,866,210 Bridge circuits and their components
A half bridge is described with at least one transistor having a channel that is capable in a first mode of operation of blocking a substantial voltage in at...
US-9,866,209 Radio frequency switch with improved switching time
A radio frequency (RF) switch which comprises an RF domain section having a plurality of RF switching elements. A DC domain section is provided having circuitry...
US-9,866,208 Precision measurements and calibrations for timing generators
Described herein are methods and subsystems for use with a timing generator having an output driver at which a timing signal having timing pulses is output. A...
US-9,866,207 Semiconductor device, power control device and electronic system
A driver integrated circuit includes a bootstrap circuit (BSC) configured to output a boot power supply voltage (VB) based on a first power supply voltage, the...
US-9,866,206 Driver circuit for memory devices
There is described a driver circuit (100) for providing biasing voltages to a flash memory device, the driver circuit comprising (a) a level shifter latch (110)...
US-9,866,205 Level conversion device and method
A device is disclosed that includes a level shifter and a selector. The level shifter includes a first current limiter. The level shifter is configured to...
US-9,866,204 Latch circuit with isolated input and/or output
A latch circuit providing isolated input current paths includes a pair of input transistors that receive a differential input signal. A plurality of steering...
US-9,866,203 High reliability power tuners
High reliability impedance tuners used in high power measurements suffer fast heating and consequently thermal expansion of the central conductor, which has a...
US-9,866,202 Digitally controlled attenuators with low phase shift
Digitally controlled attenuators with low phase shift are provided herein. In certain configurations, a digitally controlled attenuator includes an attenuation...
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