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Patent # Description
US-9,865,743 Semiconductor device including oxide layer surrounding oxide semiconductor layer
Oxygen is likely to be released or an oxygen vacancy is likely to occur during a manufacturing process particularly at a side surface of an oxide semiconductor...
US-9,865,742 Semiconductor device
It is an object to provide a semiconductor device typified by a display device having a favorable display quality, in which parasitic resistance generated in a...
US-9,865,741 Method for producing semiconductor device and semiconductor device
A method for producing a semiconductor device includes a first step of forming a first insulating film around a fin-shaped semiconductor layer on a...
US-9,865,740 Semiconductor device and manufacturing method for the same
An object is to provide a method for manufacturing a highly reliable semiconductor device including thin film transistors which have stable electric...
US-9,865,739 Replacement metal gate structures
Replacement metal gate structures with improved chamfered workfunction metal and self-aligned contact and methods of manufacture are provided. The method...
US-9,865,738 Fin field effect transistor (FinFET) having air gap and method of fabricating the same
A method of fabricating a fin field effect transistor (FinFET) is provided as follows. A fin structure is formed on a substrate. A gate pattern and a...
US-9,865,737 Formation of FinFET junction
A finFET structure, and method of forming such structure, in which a germanium enriched nanowire is located in the channel region of the FET, while...
US-9,865,736 Semiconductor devices and methods of manufacturing the same
A semiconductor device includes a gate structure on a substrate, a source/drain layer on a portion of the substrate adjacent the gate structure, a first contact...
US-9,865,735 Horizontal gate all around and FinFET device isolation
Embodiments described herein generally relate to methods and device structures for horizontal gate all around (hGAA) isolation and fin field effect transistor...
US-9,865,734 Semiconductor device and fabrication method thereof
A semiconductor device includes a gate electrode formed on a silicon substrate via a gate insulation film in correspondence to a channel region, source and...
US-9,865,733 Metal oxide semiconductor having epitaxial source drain regions and a method of manufacturing same using dummy...
A semiconductor device in which sufficient stress can be applied to a channel region due to lattice constant differences.
US-9,865,732 Integrated circuits and methods of forming integrated circuits
An integrated circuit includes a gate electrode and spacers along sidewalls of the gate electrode. The integrated circuit further includes a source/drain (S/D)...
US-9,865,731 Semiconductor device and manufacturing method thereof
A semiconductor device includes a p-type metal oxide semiconductor device (PMOS) and an n-type metal oxide semiconductor device (NMOS) disposed over a...
US-9,865,730 VTFET devices utilizing low temperature selective epitaxy
Low temperature epitaxial silicon deposition for forming the top source or drain regions of VTFET structures. The methods generally include epitaxially growing...
US-9,865,729 Laterally diffused metal oxide semiconductor with segmented gate oxide
A power transistor is provided with at least one transistor finger that lies within a semiconductor material. The gate oxide is segmented into a set of segments...
US-9,865,728 Switching device
A switching device including a semiconductor substrate including a trench (gate electrode) extending in a mesh shape is provided, and the upper surface of the...
US-9,865,727 Device architecture and method for improved packing of vertical field effect devices
A semiconductor field-effect device is disclosed that utilizes an octagonal or inverse-octagonal deep trench super-junction in combination with an octagonal or...
US-9,865,726 Method of manufacturing a semiconductor device with trench gate by using a screen oxide layer
A screen oxide layer is formed on a main surface of a semiconductor layer and a passivation layer is formed on the screen oxide layer. A gate trench is formed...
US-9,865,725 III-nitride transistor with trench gate
A transistor includes a stack of III-nitride semiconductor layers, the stack having a frontside and a backside, a source electrode in contact with the frontside...
US-9,865,724 Nitride semiconductor device
A nitride semiconductor device includes a first semiconductor layer, a second semiconductor layer, a third semiconductor layer including a nitride semiconductor...
US-9,865,723 Switching device
A switching device includes first-third semiconductor layers, a gate insulating film, and a gate electrode. The first semiconductor layer is of a first...
US-9,865,722 Avalanche energy handling capable III-nitride transistors
A semiconductor device includes a GaN FET with an overvoltage clamping component electrically coupled to a drain node of the GaN FET and coupled in series to a...
US-9,865,721 High electron mobility transistor (HEMT) device and method of making the same
A high electron mobility transistor (HEMT) device with epitaxial layers that include a gallium nitride (GaN) layer co-doped with silicon (Si) and germanium Ge...
US-9,865,720 High electron-mobility transistor
A nitride semiconductor device is disclosed. The semiconductor device provides the GaN channel layer, the InAlN barrier layer on the GaN channel layer, and the...
US-9,865,719 Carbon doping semiconductor devices
A method of fabricating a semiconductor device can include forming a III-N semiconductor layer in a reactor and injecting a hydrocarbon precursor into the...
US-9,865,718 Power MOSFET with metal filled deep sinker contact for CSP
A method of forming an IC including a power semiconductor device includes providing a substrate having an epi layer thereon with at least one transistor formed...
US-9,865,717 Semiconductor device
A semiconductor device includes transistor cells formed inside a semiconductor body. First and second semiconductor well regions have second conductivity type...
US-9,865,716 System and method for a vertical tunneling field-effect transistor cell
A semiconductor device cell is disclosed. The semiconductor device cell includes a transistor gate having a gating surface and a contacting surface and a source...
US-9,865,715 Epitaxial wafer for heterojunction bipolar transistor and heterojunction bipolar transistor
An epitaxial wafer for a heterojunction bipolar transistor and a heterojunction bipolar transistor that are capable of further reducing a turn-on voltage are...
US-9,865,714 III-V lateral bipolar junction transistor
A lateral bipolar junction transistor (LBJT) device that includes an intrinsic III-V semiconductor material having a first band gap; and a base region present...
US-9,865,713 Extremely large spin hall angle in topological insulator pn junction
The interplay between chiral tunneling and spin-momentum locking of helical surface states leads to spin amplification and filtering in a 3D Topological...
US-9,865,712 Semiconductor device and manufacturing method thereof
A minute transistor is provided. A transistor with low parasitic capacitance is provided. A transistor having high frequency characteristics is provided. A...
US-9,865,711 Methods to integrate SONOS into CMOS flow
A method of forming a transistor is described. In one embodiment the method includes: forming a channel of a transistor in a surface of a substrate; forming a...
US-9,865,710 FinFET having a non-uniform fin
A dual width SOI FinFET is disclosed in which different portions of a strained fin have different widths. A method of fabrication of such a dual width FinFET...
US-9,865,709 Selectively deposited spacer film for metal gate sidewall protection
A method of fabricating a fin field-effect transistor (FinFET) device is provided. The method includes forming a carbon-based layer on a plurality of gate...
US-9,865,708 Semiconductor strips with undercuts and methods for forming the same
An integrated circuit device includes a semiconductor substrate, and a semiconductor strip extending into the semiconductor substrate. A first and a second...
US-9,865,707 Fabricating method of a strained FET
A fabricating method of a strained FET includes providing a semiconductive layer having a gate structure disposed thereon, wherein an epitaxial layer is...
US-9,865,706 Integrated process and structure to form III-V channel for sub-7nm CMOS devices
Embodiments described herein generally relate to methods and structures for forming precise fins comprising Group III-V elements on a silicon substrate. A...
US-9,865,705 Vertical field effect transistors with bottom source/drain epitaxy
A vertical fin field-effect-transistor and a method for fabricating the same. The vertical fin field-effect-transistor includes a substrate, a first...
US-9,865,704 Single and double diffusion breaks on integrated circuit products comprised of FinFET devices
One illustrative integrated circuit product disclosed herein includes, among other things, a plurality of FinFET devices, each of which comprises a gate...
US-9,865,703 High-K layer chamfering to prevent oxygen ingress in replacement metal gate (RMG) process
A semiconductor structure includes a semiconductor substrate having an outer surface; a plurality of oxide regions, located outward of the outer surface, and...
US-9,865,702 Method for manufacturing laterally insulated-gate bipolar transistor
The present invention relates to a method for manufacturing a laterally insulated-gate bipolar transistor, comprising: providing a wafer having an N-type buried...
US-9,865,701 Schottky barrier diode and method for manufacturing the same
A Schottky barrier diode includes: an n+ type of silicon carbide substrate; an n- type of epitaxial layer formed on a first surface of the n+ type of silicon...
US-9,865,700 MOS P-N junction diode with enhanced response speed and manufacturing method thereof
A MOS P-N junction diode includes a semiconductor substrate, a mask layer, a guard ring, a gate oxide layer, a polysilicon structure, a central conductive...
US-9,865,699 Semiconductor device and method of manufacturing the same
A semiconductor device including a graphene layer and a method of manufacturing the same are disclosed. A method in which graphene is grown on a catalyst metal...
US-9,865,698 Semiconductor device blocking leakage current and method of forming the same
A semiconductor device includes a gate assembly disposed on a device isolation layer, a gate spacer disposed on a side surface of the gate assembly, a contact...
US-9,865,697 Semiconductor device structure and method for forming the same
A method for forming a semiconductor device structure is provided. The method includes forming a spacer layer and a dielectric layer over a substrate. The...
US-9,865,696 Sputtering target, method for manufacturing the same, and method for manufacturing semiconductor device
A deposition technique for forming an oxynitride film is provided. A highly reliable semiconductor element is manufactured with the use of the oxynitride film....
US-9,865,695 High-voltage transistor architectures, processes of forming same, and systems containing same
An apparatus includes a first device with a metal gate and a drain well that experiences a series resistance that drops a drain contact voltage from 10 V to 4-6...
US-9,865,694 Split-gate trench power mosfet with protected shield oxide
A plurality of gate trenches is formed into a semiconductor substrate in an active cell region. One or more other trenches are formed in a different region....
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