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| Patent # | Description |
|---|---|
| US-9,876,014 |
Germanium-based quantum well devices A quantum well transistor has a germanium quantum well channel region. A silicon-containing etch stop layer provides easy placement of a gate dielectric close... |
| US-9,876,012 |
Single die output power stage using trench-gate low-side and LDMOS
high-side MOSFETs, structure and method A voltage converter includes an output circuit having a high-side device and a low-side device which can be formed on a single die (a "PowerDie"). The high-side... |
| US-9,876,007 |
MIMcap creation and utilization methodology A metal-insulator-metal (MIM) capacitor design methodology and system substantially maximizes the benefits of including MIM capacitors in an integrated circuit... |
| US-9,875,994 |
Multi-chip package, system and test method thereof A multi-chip package may include a plurality of semiconductor chips integrated in a single package and sharing one or more command pins. Each of the... |
| US-9,875,988 |
Semiconductor device and method of forming DCALGA package using
semiconductor die with micro pillars A semiconductor device has a first semiconductor die disposed over a substrate. A plurality of composite interconnect structures are formed over the... |
| US-9,875,980 |
Copper pillar sidewall protection Methods for copper pillar protection may include forming a metal post over a contact on a semiconductor die, where the metal post comprises a sidewall. A metal... |
| US-9,875,974 |
Processing techniques for silicon-based transient devices Provided are methods of making a transient electronic device by fabricating one or more inorganic semiconductor components, one or more metallic conductor... |
| US-9,875,971 |
Magnetic shielding of MRAM package Magnetic random access memory (MRAM) packages with magnetic shield protections and methods of forming thereof are presented. Package contact traces are formed... |
| US-9,875,968 |
Interlevel conductor pre-fill utilizing selective barrier deposition A substrate is provided having a dual damascene structure formed within a dielectric material over the substrate. The dual damascene structure includes a trench... |
| US-9,875,967 |
Interconnect structure with air-gaps The present disclosure relates to an interconnect structure. In some embodiments, the interconnect structure has a first conductive body arranged within a first... |
| US-9,875,963 |
Semiconductor device According to one embodiment, an integrated circuit is formed on a semiconductor chip, a regulator supplies power to the integrated circuit via the power-supply... |
| US-9,875,959 |
Forming a stacked capacitor Stacked capacitor structures using TSVs are provided. In one aspect, a stacked capacitor structure includes: a first substrate having at least one first... |
| US-9,875,952 |
Power conversion device A power conversion device includes a heat releasing heatsink, a printed circuit board provided on the heatsink and having a through hole and wires, a metal case... |
| US-9,875,951 |
Heat sink with orientable fins A heat sink comprises a first thermally conductive base having a first face to thermally engage a heat-generating electronic component and a second thermally... |
| US-9,875,949 |
Electronic package having circuit structure with plurality of metal
layers, and fabrication method thereof An electronic package is provided, which includes: a circuit structure having opposite first and second sides; at least an electronic element disposed on the... |
| US-9,875,945 |
Laterally diffused metal oxide semiconductor device integrated with
vertical field effect transistor An electrical device that in some embodiments includes a substrate including a lateral device region and a vertical device region. A lateral diffusion metal... |
| US-9,875,937 |
Method for forming semiconductor structure with nanowire structures The present invention provides a method for forming a semiconductor structure. Firstly, a substrate is provided, the substrate comprises an insulating layer and... |
| US-9,875,926 |
Substrates with buried isolation layers and methods of formation thereof A method for fabricating a semiconductor device includes forming an opening in a first epitaxial lateral overgrowth region to expose a surface of the... |
| US-9,875,925 |
Method of fabricating semiconductor device A method of fabricating a semiconductor device includes forming a doped polysilicon layer on a substrate, forming a barrier layer on the doped polysilicon... |
| US-9,875,924 |
Spray coater and ring-shaped structure thereof A spray coater is used to spray a photoresist on a front surface of a wafer. The spray coater includes a vacuum chuck, a flow guiding ring, and a positioning... |
| US-9,875,917 |
Semiconductor bonding apparatus and related techniques A semiconductor structure bonding apparatus is disclosed. The apparatus may include a leveling adjustment system configured to provide leveling adjustment of... |
| US-9,875,914 |
Process for manufacturing a plurality of structures A process comprises the following steps: a) provision of a chamber suitable for receiving a plurality of structures, b) circulation of a gas stream in the... |
| US-9,875,913 |
Method for singulating packaged integrated circuits and resulting
structures A method of packaging an integrated circuit includes forming a first integrated circuit and a second integrated circuit on a wafer, the first and second... |
| US-9,875,906 |
Mechanisms for forming patterns using multiple lithography processes A method for forming patterns in a semiconductor device includes providing a substrate and a patterning-target layer formed over the substrate; forming a first... |
| US-9,875,891 |
Selective inhibition in atomic layer deposition of silicon-containing
films Methods of selectively inhibiting deposition of silicon-containing films deposited by atomic layer deposition are provided. Selective inhibition involves... |
| US-9,875,886 |
Double-ended ceramic metal halide lamp A double-ended ceramic metal halide lamp includes a luminous tube; at least two illuminators serially connected with each other deposed inside the luminous... |
| US-9,875,882 |
Microwave plasma processing apparatus, slot antenna, and semiconductor
device Disclosed is a microwave plasma processing apparatus. The microwave plasma processing apparatus includes a coaxial waveguide installed in a through hole which... |
| US-9,875,876 |
Charged particle beam writing apparatus and charged particle beam writing
method A charged particle beam writing apparatus according to an embodiment starts a wiring operation when the sum of the amount of shot data stored in a buffer memory... |
| US-9,875,875 |
Method and apparatus for a porous electrospray emitter An ionic liquid ion source can include a microfabricated body including a base and a tip. The body can be formed of a porous material compatible with at least... |
| US-9,875,868 |
Locking device for high-voltage switchgear The device is used for locking an access for actuating two switching devices of high-voltage switchgear with the aid of a drive shaft transmitting drive force... |
| US-9,875,866 |
Haptic keyswitch structure and input device A keyswitch structure includes a keycap layer having a keycap region and a peripheral region adjacent to the keycap region, a circuit layer disposed under the... |
| US-9,875,864 |
Keyboard and backlight module A backlight module includes a masking plate, a light guiding plate, a light emitting unit, a reflective plate and an attaching layer. A plurality of upper... |
| US-9,875,861 |
Device and method for switching a direct current A device switches a direct current. The device contains an operating current branch in which a mechanical switch is arranged, a protective switch connected to... |
| US-9,875,854 |
Flexible supercapacitor and method of fabricating the same A flexible supercapacitor comprising an electrolyte sandwiched between nickel foams electrodeposited with a nano-composite. The nanocomposite comprises of a... |
| US-9,875,849 |
Multilayer ceramic electronic component and manufacturing method thereof A multilayer ceramic electronic component includes: a main body; and a first external electrode disposed on a first surface of the main body and a second... |
| US-9,875,847 |
Multilayer ceramic electronic component and method of manufacturing the
same A multilayer ceramic electronic component includes a plurality of dielectric layers; and internal electrodes disposed on the dielectric layers and containing an... |
| US-9,875,845 |
Coupling device and coupling assembly for the contact-free transmission of
data signals and method for the... A coupling device serves for the contact-free transmission of data signals between signal conductors of two signal lines with the aid of a coupling structure.... |
| US-9,875,841 |
Systems and methods for a DC phaseback choke Phaseback DC choke includes a common core, a first coil formed about the common core, and a second coil formed about the common core in parallel opposing... |
| US-9,875,837 |
Coil electronic component A coil electronic component includes a first coil disposed on a first surface of an insulating substrate; a second coil disposed on a second surface of the... |
| US-9,875,833 |
Superconduting coil device comprising coil winding and contacts A superconducting coil device includes at least one coil winding, including at least one first and one second superconducting strip conductor, the first and... |
| US-9,875,831 |
Method for producing a multi-layer varistor component and a multi-layer
varistor component A method for producing a multi-layer varistor component is specified. A main body for the multi-layer varistor component includes a plurality of internal... |
| US-9,875,830 |
Modular, exchangeable surge protection system A surge protection system provides surge protection to one or more circuits. Each circuit is connected to power and a surge protection module bridges the... |
| US-9,875,827 |
Method for producing insulated electric wire A method for producing an insulated electric wire comprises a first step of processing a copper alloy containing a tin and inevitable impurities into a fine... |
| US-9,875,824 |
Waterproofing structure, waterproofing method and wire harness A waterproofing structure includes one or multiple insulated core wires; a shielding member configured to collectively cover the one or multiple insulated core... |
| US-9,875,822 |
Aluminum alloy conductor wire, aluminum alloy stranded wire, coated wire,
wire harness and method of... An aluminum alloy conductor wire has a composition comprising Mg: 0.1-1.0 mass %, Si: 0.1-1.20 mass %, Fe: 0.01-1.40 mass %, Ti: 0-0.100 mass %, B: 0-0.030 mass... |
| US-9,875,815 |
Fast memory array repair using local correlated electron switch (CES)
memory cells An integrated circuit is provided for self-repair of a memory array. The circuit includes first word lines coupled to first memory rows of the memory array, one... |
| US-9,875,804 |
Nonvolatile semiconductor memory device with read voltage setting
controller A nonvolatile semiconductor memory device includes a memory cell array. The memory cells of the memory cell array can be programmed to have different threshold... |
| US-9,875,800 |
3D NAND semiconductor device for erasing groups of bit lines A semiconductor device may include a memory block including memory strings connected to respective bit lines coupled to a substrate and commonly connected to a... |
| US-9,875,791 |
Semiconductor device Provided are a semiconductor device. The semiconductor device includes an SRAM cell including a first pull-up transistor, a first pull-down transistor and a... |
| US-9,875,780 |
STT MRAM source line configuration Improved STT MRAM source line configurations are provided. In one aspect, a STT MRAM array includes: a plurality of cells including magnetic tunnel junctions in... |
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