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Patent # Description
US-9,911,617 Etching method
The invention discloses a novel dry etching method, which comprises the following steps: forming a to-be-etched layer on a semiconductor substrate; forming a...
US-9,911,616 Process for treating a structure
The disclosure relates to a process for treating a structure, the structure comprising, from its back side to its front side, a carrier substrate, an insulating...
US-9,911,615 Apparatus and method for etching substrate, stamp for etching substrate and method for manufacturing the same
The inventive concepts relate to an apparatus and a method for etching a substrate, a stamp for etching a substrate, and a method for manufacturing the stamp....
US-9,911,614 Methods for activating openings for jets electroplating
One embodiment of the present invention one embodiment of the present invention is a method for electrofilling a metal or alloy inside at least one opening...
US-9,911,613 Method of fabricating a charge-trapping gate stack using a CMOS process flow
A method of fabricating a memory device is described. Generally, the method includes forming a channel from a semiconducting material overlying a surface of a...
US-9,911,612 Methods of manufacturing semiconductor devices including impurity regions
In a method of manufacturing a semiconductor device, a semiconductor substrate is prepared. Boron-containing ions are generated by reacting a borane-based...
US-9,911,611 Method of forming openings in a material layer
A method of fabricating a semiconductor device includes forming a hard mask (HM) mandrel along a first direction over a material layer, forming a first spacer...
US-9,911,610 Semiconductor device having a metal-semiconductor junction and manufacturing therefor
A method for manufacturing a semiconductor device includes providing a wafer having a first semiconductor layer, forming at the first semiconductor layer a...
US-9,911,609 Methods of forming nanostructures having low defect density
A method of forming a nanostructure comprises forming self-assembled nucleic acids on at least a portion of a substrate. The method further comprises contacting...
US-9,911,608 Method of forming patterns
A method of forming patterns includes the steps of providing a substrate on which a target layer and a hard mask layer are formed; forming a plurality of first...
US-9,911,607 Method of processing target object
A controllability of a size of a mask can be improved in a multi-patterning method. A process of forming a silicon oxide film on a first mask and an...
US-9,911,606 Mandrel spacer patterning in multi-pitch integrated circuit manufacturing
A method of manufacturing an integrated circuit (IC) includes receiving a design layout of the IC, wherein the design layout includes two abutting blocks, the...
US-9,911,605 Methods of forming fine patterns
A method of forming fine patterns includes forming pillars arrayed in rows and columns on an underlying layer and forming a spacer layer on the underlying layer...
US-9,911,604 Sidewall spacer pattern formation method
Disclosed are methods of using a lithography-lithography-etch (LLE) technique to form a sidewall spacer pattern for patterning a target layer. In the methods, a...
US-9,911,603 Pattern decomposition for directed self assembly patterns templated by sidewall image transfer
After forming spacers over a hard mask layer using a sidewall image transfer process, a neutral material layer is formed on the portions of the hard mask layer...
US-9,911,602 Embedded gallium-nitride in silicon
A method and structure for integrating gallium nitride into a semiconductor substrate. The method may also include means for isolating the gallium nitride from...
US-9,911,601 Epitaxial silicon germanium fin formation using sacrificial silicon fin templates
A method of forming semiconductor fins includes forming a plurality of sacrificial template fins from a first semiconductor material; epitaxially growing fins...
US-9,911,600 Fabrication of semiconductor device using alternating high and low temperature layers
A method for fabricating a III-nitride semiconductor body that includes high temperature and low temperature growth steps.
US-9,911,599 Method of fabricating nanowire field effect transistor having a preplacement gate by using sacrificial etch layer
A device includes a substrate, a buffer layer, a nanowire, a gate structure, and a remnant of a sacrificial layer. The buffer layer is above the substrate. The...
US-9,911,598 Symmetric tunnel field effect transistor
The present disclosure relates to semiconductor structures and, more particularly, to a symmetric tunnel field effect transistor and methods of manufacture. The...
US-9,911,597 Trench metal insulator metal capacitor with oxygen gettering layer
A method including forming an oxygen gettering layer on one side of an insulating layer of a deep trench capacitor between the insulating layer and a substrate,...
US-9,911,596 Modification processing method and method of manufacturing semiconductor device
A modification processing method includes preparing a substrate having a silicon layer on which a damage layer is formed through plasma processing. The method...
US-9,911,595 Selective growth of silicon nitride
Methods and apparatuses for selectively depositing silicon nitride on silicon surfaces relative to silicon oxide surfaces and selectively depositing silicon...
US-9,911,594 Selective atomic layer deposition process utilizing patterned self assembled monolayers for 3D structure...
Methods for forming fin structure with desired materials formed on different locations of the fin structure using a selective deposition process for three...
US-9,911,593 NAND flash memory and fabrication methods thereof
A method for fabricating an NAND flash memory includes providing a semiconductor substrate with a core region and a peripheral region, forming a plurality of...
US-9,911,592 Method for making nanosheet CMOS device integrating atomic layer deposition process and replacement gate structure
A semiconductor device including a gate structure present on at least two suspended channel structures, and a composite spacer present on sidewalls of the gate...
US-9,911,591 Selective deposition of thin film dielectrics using surface blocking chemistry
Methods of depositing a film selectively onto a first substrate surface relative to a second substrate surface. Methods include soaking a substrate surface...
US-9,911,590 Methods of forming dielectric films, new precursors and their use in semiconductor manufacturing
Method of deposition on a substrate of a dielectric film by introducing into a reaction chamber a vapor of a precursor selected from the group consisting of...
US-9,911,589 Induction RF fluorescent lamp with processor-based external dimmer load control
A processor controlled induction RF fluorescent lamp, where the control processor runs a load control algorithm at least for switching the electrical load for...
US-9,911,588 Methods and systems for quantitative mass analysis
A method of quantitative mass analysis of precursor species of different mass-to-charge (m/z) ratios from a single or the same ion injection event is disclosed....
US-9,911,587 Methods and systems for quantitative mass analysis
A method of quantitative mass analysis of precursor species of different mass-to-charge (m/z) ratios from the same ion injection event is disclosed. A plurality...
US-9,911,586 Mass spectrometer with power supply switching and dummy load
A method of switching between two modes of power supply to a mass analyzer is provided. In a first mode of operation, operated for a first predefined time...
US-9,911,585 Data-independent mass spectral data acquisition including data-dependent precursor-ion surveys
A mass spectrometry method comprises: acquiring a series of survey mass spectra of first-generation ions generated from a sample; acquiring a series of...
US-9,911,584 Batch production of microchannel plate photo-multipliers
In-situ methods for the batch fabrication of flat-panel micro-channel plate (MCP) photomultiplier tube (PMT) detectors (MCP-PMTs), without transporting either...
US-9,911,583 Apparatus for enhanced physical vapor deposition
An apparatus has a primary cathode configured for free space interaction with a substrate operative as an anode. A first annular cathode faces a second annular...
US-9,911,582 Methods and apparatus for controlling photoresist line width roughness with enhanced electron spin control
The present disclosure provides methods and an apparatus for controlling and modifying line width roughness (LWR) of a photoresist layer with enhanced electron...
US-9,911,581 Spherical device for detecting particles or radiation
A device for detecting includes a cathode forming a hollow sphere, filled with an ionisation and amplification gas, and an anode placed at the centre of the...
US-9,911,580 Substrate processing apparatus, method of manufacturing semiconductor device, and baffle structure of the...
A conventional substrate processing apparatus for generating plasma cannot generate plasma with high density and thus throughput of substrate processing is low....
US-9,911,579 Showerhead having a detachable high resistivity gas distribution plate
Embodiments of showerheads having a detachable gas distribution plate are provided herein. In some embodiments, a showerhead for use in a semiconductor...
US-9,911,578 Small plasma chamber systems and methods
A plasma deposition chamber is disclosed. A substrate support for supporting a surface to be processed is in the chamber. A processing head including an array...
US-9,911,577 Arrangement for plasma processing system control based on RF voltage
An arrangement for controlling a plasma processing system is provided. The arrangement includes an RF sensing mechanism for obtaining an RF voltage signal. The...
US-9,911,576 Ion bombardment apparatus and method for cleaning of surface of base material using the same
In an ion bombardment apparatus of the present invention, a heating type thermal electron emission electrode formed by a filament is placed on one inner surface...
US-9,911,575 Apparatus for charged particle lithography system
A charged particle multi-beam lithography system includes an illumination sub-system that is configured to generate a charged particle beam; and multiple plates...
US-9,911,574 Scanning probe lithography methods utilizing an enclosed sinusoidal pattern
Provided among other things are a scanning electron microscope, scanning transmission electron microscope, focused ion beam microscope, ion beam micromachining...
US-9,911,573 Methods, apparatuses, systems and software for treatment of a specimen by ion-milling
Methods, apparatuses, systems and software for ion beam milling or machining are disclosed. The apparatus includes a specimen holder, a table, one or more ion...
US-9,911,572 Method for controlling an interaction between droplet targets and a laser and apparatus for conducting said method
A method for controlling an interaction between droplet targets and a high power and high-repetition-rate laser beam at a laser focus position of the laser beam...
US-9,911,571 High voltage electron beam system and method
A high voltage inspection system that includes a vacuum chamber; electron optics that is configured to direct an electron beam towards an upper surface of a...
US-9,911,570 Antiwetting coating for liquid metal
Technology is described for an antiwetting coating attached to a substrate (e.g., metal substate) on a liquid metal container. In one example, the liquid metal...
US-9,911,569 X-ray tube anode arrangement
A method of manufacturing an X-ray tube component, includes diffusion bonding or brazing an anode of rhodium, molybdenum or tungsten to a heat spreader of...
US-9,911,568 Metal-jet X-ray tube
A metal jet x-ray tube is proposed, that is affected less than conventional tubes by the problem of the power density at the point of incidence of the electron...
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