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Patent # Description
US-9,923,594 Voltage swing uniformity in radio-frequency switches
Fabricating a radio-frequency switching circuit involves providing a substrate, forming, on the substrate, one or more field-effect transistors connected in...
US-9,923,593 Transmitter receiver leakage reduction in a full duplex system without the use of a duplexer
A transceiver suitable for frequency duplex division communication is disclosed. The transceiver comprises a transmitter, wherein the transmitter comprises a...
US-9,923,592 Echo cancellation using minimal complexity in a device
Described herein are technologies related to an implementation of a system to measure and compensate non-linearity (e.g., echo cancellation) in a transceiver...
US-9,923,591 Array antennas including non-uniform antenna elements
Network nodes including a non-uniform plurality of array antenna elements coupled to transceiver circuitry configured to provide communications in a cellular or...
US-9,923,590 Pack assembly for a mobile device
A wearable pack assembly includes a pack carried by a base of a harness. The pack includes an opening to a windowed pocket for receiving a mobile device, having...
US-9,923,589 Systems, methods, and devices for managing coexistence of multiple transceiver devices using bypass circuitry
A communications apparatus includes a first transceiver, a second transceiver, a first antenna, and a second antenna. The communications apparatus further...
US-9,923,588 Wireless piezoelectric indicator
An apparatus includes a piezoelectric sensor, a charge manager, a processor, and a transceiver. The piezoelectric sensor is configured to generate a first...
US-9,923,587 Mobile wireless communications system including NFC carrying case and related methods
A mobile wireless communications system may include a mobile wireless communications device that may include a portable housing, a wireless transceiver carried...
US-9,923,586 Apparatus and method for estimating carrier frequency offset for multipath signals
An apparatus for estimating carrier frequency offset for multipath signals includes an echo signal filtering circuit, an M.sup.th power circuit, a spectrum...
US-9,923,585 Interference cancellation in microwave backhaul systems
A first microwave backhaul assembly comprises a first antenna, a front-end circuit, an inter-backhaul-assembly interface circuit, and an interference...
US-9,923,584 Rectifiers for wireless power transfer with impedance inverting filters for reduced electromagnetic interference
Resonant rectifier topologies are described for tuning the rectifier so that it performs from an electromagnetic interference (EMI) point of view, while...
US-9,923,583 Coordination between multiple WLAN cores that are using the same frequency band
A system and method to communicate in a wireless local area network (WLAN) device having a first Media Access Control (MAC) and a second MAC is provided. The...
US-9,923,582 High-frequency signal predistortion device and nonlinear distortion correcting device for power amplifier
A high-frequency signal predistortion device includes a high-frequency signal estimator, a predistortion estimator, and a predistorter. The high-frequency...
US-9,923,581 Front-end module and antenna design for a wireless device simultaneously using WLAN modules operating in...
Systems and methods for enabling a WLAN client to communicate simultaneously over more than one band at a time are described, where each client has at least one...
US-9,923,580 Error correction decoder and operation method of the error correction decoder
The inventive concepts relate to an operation method of an error correction decoder correcting an error of data read from a nonvolatile memory. The operation...
US-9,923,579 Clock path technique for using on-chip circuitry to generate a correct encode pattern to test the on-chip circuitry
Aspects include techniques for implementing a clock path technique for using on-chip circuitry to generate a correct encode pattern to test the on-chip...
US-9,923,578 Parity check circuit and memory device including the same
A parity check circuit may include a first signal combination unit for generating first to N.sup.th combination signals by combining first to N.sup.th signals,...
US-9,923,577 Hybrid software-hardware implementation of lossless data compression and decompression
A system, method and product for providing data compression and decompression. A method is disclosed that includes: utilizing a CPU to perform a matching-bytes...
US-9,923,576 Decoding techniques using a programmable priority encoder
A system, computer-readable media, and methods are disclosed for building a decoding table. The system may include one or more registers configured to store a...
US-9,923,575 Compression of multidimensional sonic data
Compression of multidimensional sonic data is disclosed. Example methods disclosed herein to compress input multidimensional sonic data include decorrelating...
US-9,923,574 Analogue-to-digital converter
This application relates to analog-to-digital converters (ADCs). An ADC 200 has a first converter (201) for receiving an analog input signal (AIN) and...
US-9,923,573 Method and device for reading a serial data stream
A method for reading a serial data stream in a piece of automation technology equipment includes encoding the data stream to include at least two symbols which...
US-9,923,572 Delta modulator receive channel for capacitance measurement circuits
A circuit, system, and method for measuring capacitance are described. A current may be received at an input of a conversion circuit. The current may be...
US-9,923,571 Ramp analog-digital converter able to provide an average of two signals directly
Ramp analog-digital converters used in matrix image sensors to provide a digital value representative of a level of illumination of a pixel are provided. Two...
US-9,923,570 Time-based delay line analog-to-digital converter with variable resolution
Embodiments of the present disclosure include a differential digital delay line analog-to-digital converter (ADC), comprising differential digital delay lines...
US-9,923,569 Self-adaptive analog-to-digital converter
A self-adaptive SAR ADC techniques that can increase speed and/or decrease its power consumption. In some example approaches, one or more bits from a conversion...
US-9,923,568 Pipelined SAR with TDC converter
An analog-to-digital converter (ADC) that uses voltage-based signal processing and time-based signal processing to convert an analog input signal to a digital...
US-9,923,567 Analog-to-digital converter protection circuit, method for controlling analog-to-digital converter protection...
An analog-to-digital converter protection circuit, a method for controlling an analog-to-digital converter protection circuit, and a controller are disclosed....
US-9,923,566 Spread spectrum clock generator
A phase or frequency locked-loop circuit includes an oscillator configured to generate an output clock signal having a frequency set by an oscillator control...
US-9,923,565 Differential phase-frequency detector
A phase-frequency detector (PFD) is electrically coupled to a charge pump of a phase-locked-loop (PLL). The PFD includes a first differential latch electrically...
US-9,923,564 Clock data recovery apparatus and method capable of reducing more noise as well as tracking larger frequency...
A clock data recovery apparatus includes an oscillator, a sampler circuit, and a frequency control circuit. The oscillator generates a clock signal according to...
US-9,923,563 Deterministic jitter removal using a closed loop digital-analog mechanism
A digital phase lock loop (DPLL) device or system can operate to analyze and estimate a deterministic jitter in the digital domain, while correcting for it in...
US-9,923,562 Data storage device state detection on power loss
Upon a first transition from a first state to a second state, a first bit in a memory unit comprising a plurality of bits is programmed. Upon a first transition...
US-9,923,561 Reconfigurable device
Main memory access from a CPU is reduced, and thus an increase in speed of data processing is achieved. Provided is a reconfigurable device (20) connected to a...
US-9,923,560 Method and apparatus for current/power balancing
Aspects of the disclosure provide a system having a power circuit. The power circuit includes a first switch circuit having at least a first transistor and a...
US-9,923,559 Load driver
A method for driving a load includes driving a load to an initial voltage within a voltage window, the voltage window based on an input voltage and an offset...
US-9,923,558 Voltage source driver for a parallel resonant magnetic field generator
A magnetic field generator. In one embodiment, the magnetic field generator includes a drive circuit including a MOSFET gate driver having an output terminal; a...
US-9,923,557 Switching circuit and power conversion circuit
A first switching element and a gate of a voltage-driven switching element are connected by a gate turn-on wiring through a first resistor. The gate of the...
US-9,923,556 Power devices, structures, components, and methods using lateral drift, fixed net charge, and shield
Lateral power devices where immobile electrostatic charge is emplaced in dielectric material adjoining the drift region. A shield gate is interposed between the...
US-9,923,555 Fine-grained power gating in FPGA interconnects
Systems and methods for power gating in logic and/or computing circuitry in accordance with embodiments of the inventions are disclosed. In one embodiment, a...
US-9,923,554 Wireless power transmitter
A wireless power transmitter includes an amplifier configured to amplify a power; a transmitter configured to resonate the power amplified by the amplifier; and...
US-9,923,553 Systems and methods for non-volatile flip flops
A non-volatile flip flop integrated circuit includes a master latch circuit, a slave latch circuit coupled to the master latch circuit, and a non-volatile...
US-9,923,552 Latch circuitry
Circuitry is configured to store data in response to a phase transition of an input clock. The circuitry uses a master-slave latch configuration. Each of the...
US-9,923,550 Estimating secondary path phase in active noise control
The technology described in this document can be embodied in a computer-implemented method that includes receiving, by one or more processing devices, a first...
US-9,923,549 Discrete time polyphase channelizer
There is provided a finite impulse response (FIR) filter for filtering an input voltage signal to generate an output current signal, the FIR filter including a...
US-9,923,548 Switched mode negative inductor
A switched mode negative inductance circuit includes an input node responsive to a voltage signal. The circuit also includes first and second voltage sources,...
US-9,923,547 Method and system for a distributed transmission line multiplexer for a multi-core multi-mode...
Methods and systems for a distributed transmission line multiplexer for a multi-core multi-mode voltage-controlled oscillator (VCO) may comprise a plurality of...
US-9,923,546 High-pass filter circuit and band-pass filter circuit
Two types of high-pass filter circuit and a band-pass filter circuit are provided. Both types of high-pass filter circuit include a capacitor configured to...
US-9,923,545 Compound spring MEMS resonators for frequency and timing generation
A compound spring MEMS resonator includes a resonator body constructed using one or more spring unit cells forming a compound spring block and one or more...
US-9,923,544 Piezoelectric vibration element, manufacturing method for piezoelectric vibration element, piezoelectric...
A piezoelectric vibration element includes a piezoelectric substrate including a thin vibration region and a thick section integrated along three sides...
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