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Patent # Description
US-9,928,928 Packaging for transporting and/or storing radioactive material, comprising a more effective corner shock absorber
Packaging for transporting and/or storing radioactive material, comprising a packaging body which defines therein a cavity for housing radioactive material, and...
US-9,928,927 Heating plasma for fusion power using magnetic field oscillation
In one embodiment, a fusion reactor includes two internal magnetic coils suspended within an enclosure, a center magnetic coil coaxial with the two internal...
US-9,928,926 Active cooling of structures immersed in plasma
A fusion reactor includes an enclosure having a first end, a second end, and a midpoint substantially equidistant between the first and second ends of the...
US-9,928,925 Multi-chip non-volatile semiconductor memory package including heater and sensor elements
A method of healing a plurality of non-volatile semiconductor memory devices on a multi-chip package is disclosed. The multi-chip package can be heated to a...
US-9,928,924 Systems, methods, and computer programs for resolving dram defects
Systems, methods, and computer programs are disclosed for resolving dynamic random access memory (DRAM) defects. One embodiment is a system comprising a dynamic...
US-9,928,923 Estimation of level-thresholds for memory cells
Methods and apparatus are provided for determining level-thresholds for q-level memory cells. A plurality of the memory cells are read to obtain respective read...
US-9,928,922 Shift register and method for driving the same, gate driving circuit and display device
The present invention provides a shift register and a method for driving the same, a gate driving circuit and a display device, the shift register includes a...
US-9,928,921 Non-volatile memory, semiconductor device and reading method
There is provided a non-volatile memory circuit including: plural storage element sections each including a zener zap device and a switch section that connects...
US-9,928,920 Memory controller, storage device, and read retry method
According to one embodiment, a temperature of a non-volatile memory or an ambient temperature of the non-volatile memory is acquired. A distribution of a...
US-9,928,919 Method and apparatus for staggered start-up of a predefined, random, or dynamic number of flash memory devices
A method, apparatus, and manufacture for memory device startup is provided. Flash memory devices are configured such that, upon the power supply voltage...
US-9,928,918 Non-volatile semiconductor memory having multiple external power supplies
A memory device includes core memory such as flash memory for storing data. The memory device includes a first power input to receive a first voltage used to...
US-9,928,917 Memory device and memory system having the same
A memory device includes a memory cell, a bit line connected to the memory cell, a control voltage generator configured to generate a proportional to absolute...
US-9,928,916 Semiconductor memory device
A semiconductor memory device includes a memory block, a plurality of bit lines, a plurality of select gate lines, a plurality of word lines, and a controller....
US-9,928,915 Non-volatile semiconductor storage device
For data erase from an electrically erasable and programmable non-volatile memory cell, the following operations are performed: an erase operation to apply an...
US-9,928,914 Methods and apparatus to read memory cells based on clock pulse counts
A disclosed example determines programmed states of a plurality of memory cells based on a counter reaching a trigger count value, the trigger count value...
US-9,928,913 Semiconductor memory system including a plurality of semiconductor memory devices
A communication line is connected to first and second chips, and held at a first signal level. A monitor circuit changes a signal level of the communication...
US-9,928,912 Three-dimensional addressing for erasable programmable read only memory
Three-dimensional addressing for erasable programmable read only memory (EPROM) can include a number of EPROM banks, a number of shift registers, a row select...
US-9,928,911 Method and apparatus for providing multi-page read and write using SRAM and nonvolatile memory devices
A memory device includes a static random-access memory ("SRAM") circuit and a first nonvolatile memory ("NVM") string, a second NVM string, a first and a second...
US-9,928,910 Semiconductor memory having volatile and multi-bit non-volatile functionality and method of operating
A semiconductor memory cell, semiconductor memory devices comprising a plurality of the semiconductor memory cells, and methods of using the semiconductor...
US-9,928,909 RRAM reset of low resistive cells
A circuit having a Resistive Random Access Memory (RRAM) cell coupled between a supply voltage and a sense node; a first transistor coupled between the sense...
US-9,928,908 Resistance-change memory operating with read pulses of opposite polarity
According to one embodiment, a resistance-change memory includes a memory cell and a control circuit. The memory cell comprises first and second electrodes, and...
US-9,928,907 Block erase schemes for cross-point non-volatile memory devices
A storage device includes a cross-point non-volatile memory (NVM) device that includes a first subset of cells. Cells of the first subset of cells may share...
US-9,928,906 Data-write device for resistance-change memory element
A data-write device includes a write driver that causes a current to flow through a current path including an MTJ element or the other current path including...
US-9,928,905 Sensing device of nonvolatile resistive memory
An embodiment of the invention provides a sensing device. The sensing device includes a controller, a Resistive random memory sensor, an access circuit and a...
US-9,928,904 Arrays of bit-cells
An example device in accordance with an aspect of the present disclosure includes a plurality of bit-cells coupled as an array. A bit-cell includes a first...
US-9,928,903 Semiconductor storage device with voltage generator which generates voltages and currents for read and write...
According to one embodiment, a semiconductor storage device includes: a memory cell including a variable resistance element; a bit line coupled to the memory...
US-9,928,902 Methods of operating storage devices
In a method of operating a storage device including at least one nonvolatile memory device and a memory controller configured to control the at least one...
US-9,928,901 SRAM with first and second precharge circuits
A semiconductor storage device includes an SRAM memory cell composed of a drive transistor, a transfer transistor and a load transistor, an I/O circuit that is...
US-9,928,900 Low power semiconductor memory device
A semiconductor device having static memory cells is designed to reduce leakage current and power consumption. The static memory cells are coupled to word lines...
US-9,928,899 Flying and twisted bit line architecture for dual-port static random-access memory (DP SRAM)
A bit line architecture for dual-port static random-access memory (DP SRAM) is provided. An array of memory cells is arranged in rows and columns, and comprises...
US-9,928,898 Wordline adjustment scheme
A memory and a method for operating a memory are provided. The memory includes a memory cell having a transistor and a wordline driver outputting a wordline...
US-9,928,897 Memory module voltage regulator module (VRM)
An example device in accordance with an aspect of the present disclosure includes a memory module having a voltage regulator module (VRM) to receive input power...
US-9,928,896 Refresh control device
A refresh control device may include a first oscillator configured to generate a first oscillation signal, a second oscillator configured to generate a second...
US-9,928,895 Volatile memory device and electronic device comprising refresh information generator, information providing...
A volatile memory device includes a refresh controller configured to control a hidden refresh operation performed on a first portion of memory cells while a...
US-9,928,894 Writing to cross-point non-volatile memory
Methods, systems, and devices for preventing disturb of untargeted memory cells during repeated access operations of target memory cells are described for a...
US-9,928,893 Circular printed memory system and method having robustness to orientation
A circular memory device includes a plurality of bottom electrodes, a plurality of top electrodes, a ferroelectric layer, and a plurality of memory storage...
US-9,928,892 Memory apparatuses having ground switches
A resistive memory apparatus includes a memory cell array having a plurality of memory cells and a first ground switch. The plurality of memory cells are...
US-9,928,891 Nonvolatile variable resistance memory circuit which includes magnetic tunnel junction element
One end of a current path of a second field-effect transistor is connected to a gate of a first field-effect transistor. One end of a magnetic tunnel junction...
US-9,928,890 System and method for calibrating memory using credit-based segmentation control
A system and method for calibrating memory using credit-based segmentation control is disclosed. A memory and a memory controller coupled thereto. The memory...
US-9,928,889 Bitline precharge control and tracking scheme providing increased memory cycle speed for pseudo-dual-port memories
A write precharge period for a pseudo-dual-port memory is initiated by an edge (rising or falling) of a read precharge signal. The same edge type (rising or...
US-9,928,888 Low power consumption memory device
A memory device includes a memory cell, a local bit line, a data line, first and second pass gate circuits, and a sense amplifier. The local bit line is coupled...
US-9,928,887 Data shift by elements of a vector in memory
Examples of the present disclosure provide apparatuses and methods for performing shift operations in a memory. An example method comprises performing a shift...
US-9,928,886 Low power memory device
A memory device comprises a plurality of word lines elongated along a first direction, and at least one memory unit. The at least one memory unit comprises a...
US-9,928,885 Nonvolatile memory device, nonvolatile memory system, and operating method of nonvolatile memory
A nonvolatile memory device may include a nonvolatile memory device may include a nonvolatile memory cell array; a peripheral circuit suitable for: activating...
US-9,928,884 Elastic memory expansion chip architecture
An integrated circuit (IC) can dynamically manage memory communication paths between multiple processors and multiple memory modules. The IC can include...
US-9,928,883 TFD I/O partition for high-speed, high-density applications
A microelectronic package can include a substrate having first and second surfaces, first, second, and third microelectronic elements each having a surface...
US-9,928,882 Screw-free removable hard disk case
A screw-free removable hard disk case includes a carrier, a slide rail and a slide sheet. The carrier includes a first lateral plate and a second lateral plate...
US-9,928,881 Dynamic write field test for a perpendicular recording head
A method of testing a dynamic write field of a recording head includes preparing a test magnetic medium and recording a write signal on the test magnetic medium...
US-9,928,880 System management device, system management method, and program
A system management device (1) includes: a data request transmission unit (5) which successively transmits data request signals (C5) to a management object...
US-9,928,879 Video processing method, and video processing device
This technology is a video processing method and a video processing device, in which a processor performs processing on video data of video obtained by...
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