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Patent # Description
US-9,928,113 Intelligent compiler for parallel graph processing
An analyzer (such as a compiler) searches for a program portion that matches a pattern that may suffer from workload imbalance due to nodes with high degrees...
US-9,928,112 Configuration of floating node boundaries
Embodiments of the present invention provide systems and methods for resource allocation. The systems and methods for resource allocation include: configuring a...
US-9,928,111 System and method for configuration tagging in a multitenant application server environment
In accordance with an embodiment, described herein is a system and method for supporting the use of configuration tagging in a multitenant application server...
US-9,928,110 Resource allocation based on processor assignments
An apparatus may include first and second processors. A first user may be bound to the first processor such that processes of the first user execute on the...
US-9,928,109 Method and system for processing nested stream events
One embodiment of the present disclosure sets forth a technique for enforcing cross stream dependencies in a parallel processing subsystem such as a graphics...
US-9,928,108 Metaevent handling for on-demand code execution environments
Systems and methods are described for generating and executing metaevents within an on-demand code execution environment. The code execution environment can...
US-9,928,107 Fast IP migration in a hybrid network environment
Technologies are described herein for migrating network addresses between host computers in a hybrid network environment. Before migrating a network address...
US-9,928,106 System and methods for dynamically assigning control to one or more BOTs
Method and system for dynamically assigning control to one or more BOTs to execute at least one task are disclosed. The method comprises tracking user actions...
US-9,928,105 Stack overflow prevention in parallel execution runtime
A parallel execution runtime prevents stack overflow by maintaining an inline counter for each thread executing tasks of a process. Each time that the runtime...
US-9,928,104 System, method, and computer program product for a two-phase queue
A system, method, and computer program product are provided for accessing a queue. The method includes receiving a first request to reserve a data record entry...
US-9,928,103 Methods, systems, and computer readable mediums for managing distributed computing systems using an event...
Methods, systems, and computer readable mediums for managing distributed computing systems using an event driven framework are disclosed. In some examples, a...
US-9,928,102 Method and apparatus for randomizing computer instruction sets, memory registers and pointers
Described herein is a method and apparatus to randomize instruction sets, memory registers, and pointers to increase computer security by increasing resource...
US-9,928,101 Certificate based connection to cloud virtual machine
In an environment that includes a host computing system that executes virtual machines, and a secure cloud computing channel that communicatively couples the...
US-9,928,100 Adjusting virtual machine migration plans based on alert conditions related to future migrations
Migration of virtual machines within a computing environment is facilitated. A processor obtains a current virtual machine to host mapping in the computing...
US-9,928,099 Fingerprint-based capacity management of physical hosts
A virtual computer system service receives a request to migrate a virtual machine instance from a first physical host to another physical host. The virtual...
US-9,928,098 Identifying application usage roles for devices provided to virtual machines
Embodiments of the disclosure provide techniques for or managing devices for a virtual machine. A method is provided that includes associating, by a processing...
US-9,928,097 Methods, systems, and computer readable mediums for defining and updating a virtual computing system comprising...
Methods, systems, and computer readable mediums for defining and updating a virtual converged infrastructure system comprising distributed resource components...
US-9,928,096 Preventing interoperability conflicts in a shared computing environment
A hypervisor can handle requests from applications in a processing environment, where the processing environment consists of shared computing resources. A...
US-9,928,095 Preventing interoperability conflicts in a shared computing environment
A hypervisor can handle requests from applications in a processing environment, where the processing environment consists of shared computing resources. A...
US-9,928,094 Hardware accelerated virtual context switching
In a virtual computing environment, a system configured to switch between isolated virtual contexts. A system includes a physical processor. The physical...
US-9,928,093 Methods and systems for establishing connections associated with virtual machine migrations
An example method of establishing one or more connections between a target host machine and a remote endpoint connected to a virtual machine (VM) running on a...
US-9,928,092 Resource management in a virtual machine cluster
Managing resources in a VM cluster; allocation of resources among competing VMs. Assigning VMs to real devices, responsive to needs for resources: processor...
US-9,928,091 Techniques for streaming virtual machines from a server to a host
Techniques for configuring a commodity server to host virtual hard disks are disclosed herein. In an exemplary embodiment, a virtual hard disk file can be split...
US-9,928,090 Method for processing dynamic language and electronic device using the same
Methods and apparatuses are provided for processing a dynamic language application in an electronic device. A first machine code is generated using a first...
US-9,928,089 Optimizing software code
A method of optimizing software source code, where the source code is for execution as compiled bytecode using a just-in-time compiler. The source code is...
US-9,928,088 Method, apparatus, server and system for implementing web application
A method, apparatus, server and system for implementing a web application. The method, for example, comprises: detecting an operating environment of a current...
US-9,928,087 State-preserving reversible configuration change
At a system configured according to a first configuration, an activity that uses a second configuration is detected. A set of changes is determined, which when...
US-9,928,086 System and method for software feature management
A method includes providing a computer readable code configured to perform a process of feature management. The computer code includes one or more configurable...
US-9,928,085 Stack-based adaptive localization and internationalization of applications
The disclosed embodiments provide a system that facilitates use of an application. During operation, the system obtains a language stack containing an ordered...
US-9,928,084 Electronic device and method for activating application
An electronic device is provided with an activation unit for activating an application wherein character input to a character input area is possible, a memory...
US-9,928,083 Tab trimming
Various embodiments proactively monitor and efficiently manage resource usage of individual tabs. In at least some embodiments, one or more tabs can be...
US-9,928,082 Methods and systems for remote device configuration
Systems and methods described herein may perform processing associated with loading, with a boot agent injection module in communication with a processor; a...
US-9,928,081 Customizing program logic for booting a system
A method and system are provided for generating customized program logic operable to control hardware devices of a target system and to boot said target system....
US-9,928,080 Hardware security module access management in a cloud computing environment
Trusted firmware on a host server is used for managing access to a hardware security module (HSM) connected to the host server. The HSM stores confidential...
US-9,928,079 Conditional processor auto boot with no boot loader when coupled with a nonvolatile memory
The use of a sleep, or halt, instruction enables a processor to halt execution when read from a non-volatile memory. The opcode for the sleep instruction is the...
US-9,928,078 Method of displaying information in booting, and electronic apparatus and mobile terminal using the same
A method of displaying information when an electronic apparatus is booted is provided. The method includes storing specific information, the specific...
US-9,928,077 Chip starting method, multi-core processor chip and storage medium
A chip starting method, a multi-core processor chip and a storage medium. The chip starting method comprises: setting a first starting priority for more than...
US-9,928,076 Method and apparatus for unstructured control flow for SIMD execution engine
An apparatus and method for a SIMD unstructured branching. For example, one embodiment of a processor comprises: an execution unit having a plurality of...
US-9,928,075 Load queue entry reuse for operand store compare history table update
Embodiments relate to load queue entry reuse for operand store compare (OSC) history table update. An aspect includes allocating a load queue entry in a load...
US-9,928,074 System and method for an asynchronous processor with token-based very long instruction word architecture
Embodiments are provided for an asynchronous processor with token-based very long instruction word architecture. The asynchronous processor comprises a memory...
US-9,928,073 Determining of validity of speculative load data after a predetermined period of time in a multi-slice processor
Operation of a multi-slice processor that includes a plurality of execution slices and a plurality of load/store slices coupled via a results bus includes:...
US-9,928,072 Detecting and recording atomic execution
A system includes a processor configured to: initiate atomic execution of a plurality of instruction units in a thread, starting with a beginning instruction...
US-9,928,071 Enhanced managed runtime environments that support deterministic record and replay
A system includes a processor configured to: initiate atomic execution of a plurality of instruction units in a thread, starting with a beginning instruction...
US-9,928,070 Microprocessor with a reservation stations structure including primary and secondary reservation stations and a...
A microprocessor with a fused reservation stations (RS) structure including a primary RS, a secondary RS, and a bypass system. The primary RS has an input for...
US-9,928,069 Predicated vector hazard check instruction
A hazard check instruction has operands that specify addresses of vector elements to be read by first and second vector memory operations. The hazard check...
US-9,928,068 Hardware managed dynamic thread fetch rate control
A system may include a memory to store an enhancer to identify a branch instruction, having a miss-prediction rate above a threshold, in an executing thread....
US-9,928,067 Methods and systems for performing a binary translation
Systems and methods are provided in example embodiments for performing binary translation. A binary translation system converts, by a translator module, source...
US-9,928,066 Instruction and logic for encoded word instruction compression
A processor includes a memory and a decompressor. The memory is to store compressed instruction. The decompressor includes logic to receive a request for an...
US-9,928,065 Variable register and immediate field encoding in an instruction set architecture
A method and apparatus provide means for compressing instruction code size. An Instruction Set Architecture (ISA) encodes instructions compact, usual or...
US-9,928,064 Instruction stream modification for memory transaction protection
Execution of a set of instructions within a transaction is prevented. A processor identifies a first set of instructions in an instruction stream of a...
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