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Patent # Description
US-9,935,192 Optimized buffer layer for high mobility field-effect transistor
A stack along a z-axis for a high-electron-mobility field-effect transistor, comprises: a buffer layer comprising a first semiconductor material comprising a...
US-9,935,191 High electron mobility transistor fabrication process on reverse polarized substrate by layer transfer
A method including forming a barrier layer on a polar compound semiconductor layer on a sacrificial substrate; coupling the sacrificial substrate to a carrier...
US-9,935,190 Forming enhancement mode III-nitride devices
A method of fabricating a III-N device includes forming a III-N channel layer on a substrate, a III-N barrier layer on the channel layer, an insulator layer on...
US-9,935,189 Transistor having germanium channel on silicon nanowire and fabrication method thereof
The present invention provides a transistor and a fabrication method thereof. By a silicon nanowire as a core region being serially wrapped by a germanium...
US-9,935,188 Insulated gate turn-off device with turn-off Schottky-Barrier MOSFET
An insulated gate turn-off (IGTO) device, formed as a die, has a layered structure including a p+ layer (e.g., a substrate), an n- epi layer, a p-well, vertical...
US-9,935,187 Ambipolar transistor and leakage current cutoff device using the same
Disclosed are an ambipolar transistor and a leakage current cutoff device using the same. The ambipolar transistor includes: a substrate; a gate formed on the...
US-9,935,186 Method of manufacturing SOI lateral Si-emitter SiGe base HBT
A SOI lateral heterojunction Si-emitter SiGe-base bipolar transistor is provided that contains an intrinsic base region that includes a small band gap region...
US-9,935,185 Superlattice lateral bipolar junction transistor
A bipolar junction transistor includes an intrinsic base formed on a substrate. The intrinsic base includes a superlattice stack including a plurality of...
US-9,935,184 Electronic device including a tunneling layer
An electronic device includes a semiconductor layer, a tunneling layer formed of a material including a two-dimensional (2D) material so as to directly contact...
US-9,935,183 Multilayer passivation or etch stop TFT
The present invention generally relates to TFTs and methods for fabricating TFTs. For either back channel etch TFTs or for etch stop TFTs, multiple layers for...
US-9,935,182 Method of fabricating thin film transistor structure
A method of fabricating a thin film transistor structure is described. An oxide semiconductor layer is fabricated by a self-aligned method and a lift-off...
US-9,935,181 FinFET having highly doped source and drain regions
A method of forming a semiconductor device that includes forming an in-situ doped semiconductor material on a semiconductor substrate, and forming fin...
US-9,935,180 Fin cut for taper device
A method of making a semiconductor device includes patterning a fin in a substrate; performing a first etch to remove a portion of the fin to cut the fin into a...
US-9,935,179 Method for making semiconductor device with filled gate line end recesses
A method for making a semiconductor device may include forming first and second spaced apart semiconductor active regions with an insulating region...
US-9,935,178 Self-aligned channel-only semiconductor-on-insulator field effect transistor
In one example, a field effect transistor includes a fin. The fin includes a conducting channel formed from semiconductor-on-insulator and source/drain regions...
US-9,935,177 Manufacturing methods of thin film transistor having an ohmic contact region and array substrate including the same
Embodiments of the present invention provide a thin film transistor and a manufacturing method thereof, an array substrate including the thin film transistor,...
US-9,935,176 Method for fabricating LDMOS using CMP technology
A method for fabricating a LDMOS device in a well region of a semiconductor substrate, including: etching a polysilicon layer above the well region through a...
US-9,935,175 Sidewall spacer for integration of group III nitride with patterned silicon substrate
After forming a trench extending through a (100) silicon layer and a buried insulator layer and into a (111) silicon layer of a semiconductor-on-insulator (SOI)...
US-9,935,174 Gap fill of metal stack in replacement gate process
A method for fabricating a semiconductor device comprises forming a replacement gate structure on a semiconductor layer of a substrate. The replacement gate...
US-9,935,173 Structure and formation method of semiconductor device structure
Structures and formation methods of a semiconductor device structure are provided. A method for forming a semiconductor device structure includes patterning a...
US-9,935,172 Methods for forming wrap around contact
Some embodiments of the present disclosure relate to a contact formed to a source or drain region of a "finned" field-effect transistor (FinFET). An epitaxial...
US-9,935,171 Vertical memory cell string with dielectric in a portion of the body
Some embodiments include a memory cell string having a body having a channel extending therein and in contact with a source/drain, a select gate adjacent to the...
US-9,935,170 Silicon carbide semiconductor device and method for manufacturing same
A silicon carbide semiconductor device can switch between an on-state and an off-state by controlling a channel region with an application of a gate voltage....
US-9,935,169 Semiconductor device and method of manufacturing the same
A semiconductor device includes a drift layer of a first conductivity-type, having a super junction structure, including a plurality of columns of a second...
US-9,935,168 Gate contact with vertical isolation from source-drain
A method of forming a semiconductor structure includes forming a gate structure having a first conductive material above a semiconductor substrate, gate spacers...
US-9,935,167 Semiconductor devices
Semiconductor devices include a channel layer on a substrate, the channel layer including a material having a lattice constant different from a lattice constant...
US-9,935,166 Capacitor with a dielectric between a via and a plate of the capacitor
In a particular embodiment, a device includes a substrate, a via that extends at least partially through the substrate, and a capacitor. A dielectric of the...
US-9,935,165 Semiconductor device, display unit, method of manufacturing display unit, and electronic apparatus
There is provided a semiconductor device that includes a substrate, an electric field shielding layer, and a semiconductor element. The electric field shielding...
US-9,935,164 Electro-optical device, electronic apparatus, and method of driving electro-optical device
A second data transfer line that is coupled to a gate layer of a drive transistor is formed in a layer higher than the gate layer, and a transfer capacitor is...
US-9,935,163 Display device and method for manufacturing the same
Provided are a display device and a method of manufacturing the same. A display device includes a coplanar thin-film transistor and a capacitor. The coplanar...
US-9,935,162 Organic electroluminescent transistor array substrate and fabrication method thereof, and display device
An embodiment of the present disclosure provides an organic electroluminescent transistor array substrate, including a substrate, and a gate layer, a gate...
US-9,935,161 Display panel and method for manufacturing the same
A display panel including first and second sub pixel electrodes, a first light emitting unit, first and second charge generation layers, a second light emitting...
US-9,935,160 OLED display device having pixel separation layer sidewall comprising curved sections
The present invention provides an OLED display device, which includes: a substrate (1), a plurality of pixel zones arranged in an array on the substrate (1),...
US-9,935,159 Display panel and display device comprising the same
Disclosed herein are a display panel capable of reducing the amount of reflected light in a non-display area where an alignment key is disposed, and a display...
US-9,935,158 Light-emitting device and display device
A technique of manufacturing a display device with high productivity is provided. In addition, a high-definition display device with high color purity is...
US-9,935,157 OLED display
The present invention provides an OLED display including a red organic light-emitting element, a green organic light-emitting element, and a blue organic...
US-9,935,156 Display device having sub-pixel array structure
A display device is discussed. The display device according to an embodiment includes a substrate including a plurality of gate lines, and a plurality of data...
US-9,935,155 Pixel structure, display panel, and display apparatus
The present disclosure provides a pixel structure, a display panel, and a display apparatus. The pixel structure includes a plurality of pixel cells having a...
US-9,935,154 Resistive memory cell structures and methods
Resistive memory cell structures and methods are described herein. One or more memory cell structures comprise a first resistive memory cell comprising a first...
US-9,935,153 Light emitting diode panel and manufacturing method thereof
A light emitting diode (LED) panel and a manufacturing method thereof are provided. The LED panel includes: a substrate; and a plurality of subpixel areas...
US-9,935,152 X-ray detector having improved noise performance
Exemplary embodiments are directed to imagining detectors and methods of fabricating the imagining detectors for use in medical imagining systems. In exemplary...
US-9,935,151 Low noise InGaAs photodiode array
A photodiode pixel structure for imaging short wave infrared (SWIR) and visible light built in a planar structure and may be used for one dimensional and two...
US-9,935,150 X-ray detection panel of X-ray detector and method of manufacturing the same
An X-ray detection panel for X-ray detectors and a method of manufacturing the same are disclosed. The X-ray detection panel includes a substrate, a photodiode...
US-9,935,149 Solid-state imaging device
A solid-state imaging device according to the present disclosure includes: a charge storage region that stores a signal charge obtained through photoelectric...
US-9,935,148 Method for forming chip package having chip connected to sensing device with redistribution layer in insulator...
A chip package is provided. The chip package includes a sensing device. The chip package also includes a first conductive structure disposed on the sensing...
US-9,935,147 Deep trench isolation structure in image sensor device
An image sensor device includes a substrate having a front surface and a back surface, and a deep trench disposed at the front surface of the substrate. The...
US-9,935,145 Image sensor with pixels having increased optical crosstalk
An image sensor includes a first pixel and a second pixel. The first pixel includes a first light sensitive element, a first light filter, and a first...
US-9,935,144 System-in-package image sensor
An image sensor package includes a ceramic substrate with a cavity disposed in the ceramic substrate. A glass layer is adhered to the ceramic substrate and...
US-9,935,143 Semiconductor device and electronic device
A small semiconductor device suitable for high-speed operation is provided. The semiconductor device includes a first circuit, a global bit line pair for...
US-9,935,142 Image sensor including transfer gates in deep trenches
An image sensor is described. The image sensor includes a photodiode that is formed in a substrate, a floating diffusion region that vertically overlaps with a...
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