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Patent # Description
US-9,940,314 Synchronising screenshots in documentation with product functionality
Systems and computer program product synchronize screenshots in documentation with product functionality. Documentation source relating to a product includes...
US-9,940,313 Displaying at least one categorized message
Displaying categorized messages includes categorizing at least one message into at least one category among a plurality of categories, displaying a number of...
US-9,940,312 Transferring a web content display from one container to another container while maintaining state
Systems and methods for transferring a web content display from one container to another container are disclosed. A request to transfer a first web content...
US-9,940,311 Optimized read/write access to a document object model
In an approach for optimizing read/write access to a document object model in a web browser, one or more computer processors detect one or more accesses to a...
US-9,940,310 Automatically converting an electronic publication into an online course
A publisher can extend existing electronic publications (e.g., formatted in EPUB format) by adding additional data such as interactive content, supplementary...
US-9,940,309 Measuring web page rendering time
A method in a network setup that includes a client entity and a network for handling a data flow to the client entity. The method estimates a screen rendering...
US-9,940,308 Dynamically providing a feed of stories about a user of a social networking system
To display a news feed in a social network environment, a social networking system generates news items regarding activities associated with a user of a social...
US-9,940,307 Augmenting text with multimedia assets
Systems and methods are provided for providing a navigation interface to access or otherwise use electronic content items. In one embodiment, an augmentation...
US-9,940,306 Font loading system and method
Disclosed herein is a system and related method for downloading fonts associated with a document in a client-server architecture. On a client side the client...
US-9,940,305 Preparation of textual content
The invention relates to solution of preparing font information related to textual content of a document. Within the solution a document file is received as an...
US-9,940,304 Methods and systems for inserting content in a mobile application
Systems and methods for automatically providing third-party content for display in a mobile application based on an interaction with the mobile application are...
US-9,940,303 Method and apparatus for decimation in frequency FFT butterfly
A pipelined decimation in frequency FFT butterfly method, and an apparatus to perform this method comprising: a data memory with at least one read port and one...
US-9,940,302 Interconnect circuits at three dimensional (3-D) bonding interfaces of a processor array
Embodiments of the invention relate to processor arrays, and in particular, a processor array with interconnect circuits for bonding semiconductor dies. One...
US-9,940,301 Cache management for RDMA data stores
Embodiments relate to methods, systems and computer program products for cache management in a Remote Direct Memory Access (RDMA) data store. Aspects include...
US-9,940,300 Board portal subsidiary management system, method, and computer program product
A board portal system provides the ability to manage multiple boards, where each of the boards may be a separate legal entity. The board portal may provide the...
US-9,940,299 Interface with variable data rate
A device includes a transmitter coupled to a node, where the node is to couple to a wired link. The transmitter has a plurality of modes of operation including...
US-9,940,298 Signal conditioner discovery and control in a multi-segment data path
In a segmented data path, a source is able to "discover" whether any tunable repeater nodes are present. When one or more tunable repeaters are discovered, the...
US-9,940,297 Method for manipulating the bus communication of a control device
A method for manipulating the bus communication of an electronic control device is provided, wherein the bus communication includes a bus hardware-independent...
US-9,940,296 Communications control system with a serial communications interface and a parallel communications interface
A communications control system is disclosed that includes a serial communications interface and a parallel communications interface for coupling a plurality of...
US-9,940,295 Extremely high frequency systems and methods of operating the same to establish USB data transport protocols
EHF communication systems described herein can selectively implement any one of the USB standards by mapping appropriate USB signal conditions over an EHF...
US-9,940,294 Method, apparatus, and system for configuring high-speed serial bus parameter
A method for configuring a high-speed serial bus parameter, including sending an application signal from a transmit end of a high-speed serial bus to a receive...
US-9,940,293 Method for efficient storage and backup of data via SCSI transport
Systems and methods are disclosed that advertise and expose a SCSI disk device type to a client computer or virtual machine, the disk device type acting as a...
US-9,940,292 Reconfigurable high speed memory chip module and electronic device with a reconfigurable high speed memory chip...
A reconfigurable high speed memory chip module includes a type of memory cell array group, a first transmission bus, and a logic unit. The type memory cell...
US-9,940,291 Assigning processors to memory mapped configuration
Embodiments herein relate to assigning processors to a memory mapped configuration. The processors having access to different buses of a Peripheral Component...
US-9,940,290 Handling CPU hotplug events in RCU without sleeplocks
Read-copy update (RCU) grace period initialization and CPU hotplugging are synchronized without a sleeplock. Periodic RCU grace period initialization includes,...
US-9,940,289 Preventing access to misplugged devices by a service processor
An approach is provided for preventing access to mis=plugged devices by a service processor (SP). The SP retrieves an expected device identifier of a device...
US-9,940,288 SerDes alignment process
The present disclosure relates to a method for use with a serializer/deserializer comprising. The method may include operatively connecting one or more lane...
US-9,940,287 Pooled memory address translation
A shared memory controller receives, from a computing node, a request associated with a memory transaction involving a particular line in a memory pool. The...
US-9,940,285 Configurable IO-channel system with embedded microcontroller
The present technology provides for an IO module system (e.g., an industrial control system) that can provide multiple-channel analog and digital interfaces to...
US-9,940,284 Streaming interconnect architecture
A device can include one of more configurable packet processing pipelines to process a plurality of packets. Each configurable packet processing pipeline can...
US-9,940,283 Application sharing in multi host computing systems
The present subject matter discloses methods and systems of application sharing in multi-host computing system (100) running multiple operating systems. In one...
US-9,940,282 Bus serialization for devices without multi-device support
A serial bus is provided with a device (sometimes herein referred to as an I2C serializer device) including circuitry and machine logic that operates as...
US-9,940,280 Provisioning an enclosure with PCIe connectivity and storage devices
An electronic assembly perform data storage operations on behalf of a set of storage processors (SPs). The electronic assembly includes an enclosure, and a set...
US-9,940,279 Processor apparatus with programmable multi port serial communication interconnections
A computing and communication chip architecture is provided wherein the interfaces of processor access to the memory chips are implemented as a high-speed...
US-9,940,278 System on chip having semaphore function and method for implementing semaphore function
A system on chip, semiconductor device, and/or method are provided that include a plurality of masters, an interface, and a semaphore unit. The interface...
US-9,940,277 Multi-channel peripheral interconnect supporting simultaneous video and bus protocols
A method includes generating, by a control unit of a first device, a handshaking signal to be transmitted to a second device via a second channel. The method...
US-9,940,276 PLC system having a plurality of CPU modules and control method thereof
Disclosed is a PLC system having a plurality of CPU modules and a control method thereof, wherein the method includes ascertaining a clock signal when a count...
US-9,940,275 System and method to avoid SMBus address conflicts via a baseboard management controller
An information handling system includes an Inter-Integrated Circuit (I2C) master device and an I2C slave device coupled to the I2C master device via an I2C bus....
US-9,940,274 Memory system and control method of memory system
According to one embodiment, an interface of a memory system includes a circuit configured to adjust output resistance for data output. When the circuit has...
US-9,940,273 Dynamic RAM sharing in software-defined TDD communication
Dynamic sharing of RAM in a software-defined communication system includes storing program code in a flash memory, categorizing parts of the code into groups of...
US-9,940,272 Hardware-based handling of missing interrupt propagation
A circuit may receive an interrupt associated with a device. The interrupt may be sent by the device via an interrupt line associated with the device. The...
US-9,940,271 Methods for using pulse signals in memory circuits
In a memory system where multiple memory chips communicate their ready/busy status on a shared bus line, a pulse mechanism is used for the individual memory...
US-9,940,270 Multiple request notification network for global ordering in a coherent mesh interconnect
A data processing system includes a plurality of processing unit. Each processing unit includes notification storage circuitry configured to store a...
US-9,940,268 Handling memory access protection and address translation in a data processing apparatus
A processing apparatus has a memory protection unit (MPU) 38 and an address translation unit (ATU) 120 which operate concurrently for memory access operations...
US-9,940,267 Compiler global memory access optimization in code regions using most appropriate base pointer registers
A processing device includes a target processor instruction memory to store a plurality of target processor instructions that include a plurality of global...
US-9,940,266 Method and system for genomic visualization
A method and system for correlating genome data with EMR/PHR data is disclosed herein. The method includes identifying a plurality of sources of genome data....
US-9,940,265 Computing system and method of operating computing system
A computing system including a memory that is shared by a plurality of components of the computing system in order to exchange data between the plurality of...
US-9,940,264 Load and store ordering for a strongly ordered simultaneous multithreading core
A mechanism for simultaneous multithreading is provided. Responsive to performing a store instruction for a given thread of threads on a processor core and...
US-9,940,263 VM inter-process communication
A method is described for enabling inter-process communication between a first application and a second application, the first application running within a...
US-9,940,262 Immediate branch recode that handles aliasing
A system and method for efficiently indicating branch target addresses. A semiconductor chip predecodes instructions of a computer program prior to installing...
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