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Patent # Description
US-9,953,883 Semiconductor device including a field effect transistor and method for manufacturing the same
A method for manufacturing a semiconductor device includes forming a semiconductor layer on a substrate, the semiconductor layer including a first semiconductor...
US-9,953,882 Method for forming nanowires including multiple integrated devices with alternate channel materials
Methods for forming a NW with multiple devices having alternate channel materials and resulting devices are disclosed. Embodiments include forming a first stack...
US-9,953,881 Method of forming a FinFET device
The present disclosure provides a method, which includes forming a first fin structure and a second fin structure over a substrate, which has a first trench...
US-9,953,880 Semiconductor device and method for fabricating the same
A method for fabricating semiconductor device includes the steps of: forming a fin-shaped structure on a substrate; forming a shallow trench isolation (STI)...
US-9,953,879 Preventing oxidation defects in strain-relaxed fins by reducing local gap fill voids
A semiconductor structure includes a strain-relaxed semiconductor substrate, fins on the strain-relaxed semiconductor substrate, the fins each having a bottom...
US-9,953,878 Method of forming a semiconductor device
A method of forming a semiconductor device is provided. The method includes forming a recess in a substrate and forming a first dielectric layer in the recess....
US-9,953,877 Backside processed semiconductor device
A method of forming a semiconductor device includes: providing a first substrate, forming at least one transistor on a first surface of the first substrate;...
US-9,953,876 Method of forming a semiconductor device structure and semiconductor device structure
The present disclosure provides a method of forming a semiconductor device structure including forming a first gate stack comprising a first gate dielectric...
US-9,953,875 Contact resistance control in epitaxial structures of finFET
A method of forming a semiconductor device includes forming fin regions on a substrate, forming a patterned polysilicon structure over the fin regions, and...
US-9,953,874 FinFETs and methods of forming FinFETs
An embodiment is a method including forming a multi-layer stack over a substrate, the multi-layer stack including alternating first layers and second layers,...
US-9,953,873 Methods of modulating the morphology of epitaxial semiconductor material
Chip structures and fabrication methods for forming such chip structures. A first device structure has a structural feature comprised of a first dielectric...
US-9,953,872 Semiconductor structure with self-aligned wells and multiple channel materials
Embodiments of the present invention provide a semiconductor structure having a strain relaxed buffer, and method of fabrication. A strain relaxed buffer is...
US-9,953,871 Wafer processing method
A laser beam is applied to the front side of a wafer along division lines, to form grooves having a depth corresponding to a finished thickness of device chips....
US-9,953,870 3D semiconductor device and system
A 3D integrated circuit device, including: a first transistor; a second transistor; and a third transistor, where the third transistor is overlaying the second...
US-9,953,869 Semiconductor device with reduced via resistance
A semiconductor interconnect structure that has a first portion included in an upper interconnect level and a second portion included in a lower interconnect...
US-9,953,868 Mechanisms of forming damascene interconnect structures
A method of forming a conductive structure includes forming a first opening and a second opening in a dielectric layer on a substrate, wherein the first opening...
US-9,953,867 Method for forming seed layer on high-aspect ratio via and semiconductor device having high-aspect ratio via...
Disclosed are a method of forming a seed layer on a high-aspect ratio via and a semiconductor device having a high-aspect ratio via formed thereby. Thus,...
US-9,953,866 Methods for forming a barrier layer with periodic concentrations of elements and structures resulting thereform
A method is provided which includes dispensing and removing different deposition solutions during an electroless deposition process to form different sub-films...
US-9,953,865 Structure and method to improve FAV RIE process margin and electromigration
A method of forming fully aligned vias in a semiconductor device includes forming an Mx level interconnect line embedded in an Mx interlevel dielectric (ILD)....
US-9,953,864 Interconnect structure
Semiconductor structures include a patterned interlayer dielectric overlaying a semiconductor substrate. The interlayer dielectric includes a first dielectric...
US-9,953,863 Methods of forming an interconnect structure
A method of forming an interconnect structure is provided. The method includes forming a first dielectric layer, and forming an opening in the first dielectric...
US-9,953,862 Plasma processing method and plasma processing apparatus
A plasma processing method performs an etching process of supplying a fluorine-containing gas into a plasma processing space and etching a target substrate, in...
US-9,953,861 Semiconductor device having a shallow trench isolation structure and methods of forming the same
A method includes a patterned hard mask layer formed over a substrate. The substrate is etched using the patterned hard mask layer to form a trench therein but...
US-9,953,860 Method of manufacturing SOI wafer
A method of manufacturing an SOI wafer, including (a) forming a thermal oxide film on an SOI layer of an SOI wafer by a heat treatment under an oxidizing gas...
US-9,953,859 SOI wafer manufacturing process and SOI wafer
Provided is an SOI wafer manufacturing method that allows production of an SOI wafer having a high gettering ability and a small resistance variance in a...
US-9,953,858 Semiconductor device and method of manufacturing same
To provide a semiconductor device having improved performance. The semiconductor device has a first insulating film formed on the main surface of a...
US-9,953,857 Semiconductor device with buried local interconnects
Embodiments of the present invention provide methods for fabricating a semiconductor device with buried local interconnects. One method may include providing a...
US-9,953,856 Protective film-forming film, sheet for forming protective film, complex sheet for forming protective film, and...
Provided is protective film-forming sheet (2) including: a protective film-forming film (1) having a light transmittance at a wavelength of 1064 nm of 55% or...
US-9,953,855 Process for transferring layers
The invention relates to a process for transferring an active layer to a final substrate using a temporary substrate, the active layer comprises a first side...
US-9,953,853 Substrate transport apparatus
A substrate transport apparatus for detecting with high accuracy rubbing between a substrate held in a substrate holding tool, and a support which transports a...
US-9,953,852 Liquid processing aparatus
A liquid processing apparatus of the present disclosure performs a liquid processing by supplying a processing liquid to a substrate that is rotating. A...
US-9,953,851 Process sheet resistance uniformity improvement using multiple melt laser exposures
Embodiments described herein relate to apparatus and methods of thermal processing. More specifically, apparatus and methods described herein relate to laser...
US-9,953,850 Substrate processing apparatus including heat-shield plate
Provided is a substrate processing apparatus. The substrate processing apparatus in which processes with respect to substrates are performed includes a lower...
US-9,953,849 Platen for reducing particle contamination on a substrate and a method thereof
Techniques for reducing particle contamination on a substrate are disclosed. In one particular exemplary embodiment, the technique may be realized with a platen...
US-9,953,848 Substrate liquid processing apparatus
A substrate liquid processing apparatus of the present disclosure supplies a plurality of processing liquids from a processing liquid supplying unit in a...
US-9,953,847 Apparatus and method for cleaning
A semiconductor structure includes a molding compound, a conductive plug, and a cover. The conductive plug is in the molding compound. The cover is over a top...
US-9,953,846 Method for fabricating a semiconductor chip panel
A method for fabricating a semiconductor chip is disclosed. In an embodiment, the method includes providing a carrier, providing a plurality of semiconductor...
US-9,953,845 Methods and systems for forming electronic modules
A method of manufacturing an electronic module includes providing a conductive strip and a dielectric material. The method includes coating the dielectric...
US-9,953,844 Manufacturing method of semiconductor package
When a plating layer is formed on through holes in semiconductor packages, first and second stacked bodies are stacked with first and second cavities formed in...
US-9,953,843 Chamber for patterning non-volatile metals
Apparatuses suitable for etching substrates at various pressure regimes are described herein. Apparatuses include a process chamber including a movable pedestal...
US-9,953,842 Methods of forming a portion of a memory array having a conductor having a variable concentration of germanium
An embodiment of a method of forming a portion of a memory array includes forming a conductor with a concentration of germanium that decreases with an...
US-9,953,841 Semiconductor device and method of fabricating the same
Provided is a method of fabricating a semiconductor device including the following steps. A substrate is provided. A material layer having an opening is formed...
US-9,953,840 Substrate processing method and substrate processing system
A substrate processing method according to the present disclosure includes: a liquid processing process of supplying a processing liquid to a substrate having a...
US-9,953,839 Gate-stack structure with a diffusion barrier material
This invention relates to an apparatus, system, and method for creating a high-k gate stack structure that includes a passivation layer. The passivation layer...
US-9,953,838 Substrate treatment apparatus and substrate treatment method
In accordance with an embodiment, a substrate treatment apparatus includes a housing, a magnetic field generating portion and a microwave supply portion. The...
US-9,953,837 Transistor having a gate comprising a titanium nitride layer and method for depositing this layer
A MOS transistor having a gate insulator including a dielectric of high permittivity and a conductive layer including a TiN layer, wherein the nitrogen...
US-9,953,836 Barrier layer above anti-punch through (APT) implant region to improve mobility of channel region of fin field...
A fin field device structure and method for forming the same are provided. The FinFET device structure includes a substrate and a fin structure extending from...
US-9,953,835 Damage free enhancement of dopant diffusion into a substrate
A method of doping a substrate. The method may include implanting a dose of a helium species into the substrate through a surface of the substrate at an implant...
US-9,953,834 Method of making self-aligned continuity cuts in mandrel and non-mandrel metal lines
A method includes providing a structure having a dielectric layer, a 1.sup.st hardmask layer, a 2.sup.nd hardmask layer and a 1.sup.st mandrel layer disposed...
US-9,953,833 Semiconductor mask blanks with a compatible stop layer
Provided is a method for creating a mask blank that includes a capping layer and a shifter layer. The capping layer is optically compatible and process...
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