Easy To Use Patents Search & Patent Lawyer Directory

At Patents you can conduct a Patent Search, File a Patent Application, find a Patent Attorney, or search available technology through our Patent Exchange. Patents are available using simple keyword or date criteria. If you are looking to hire a patent attorney, you've come to the right place. Protect your idea and hire a patent lawyer.

Searching:





Search by keyword, patent number, inventor, assignee, city or state:




Patent # Description
US-9,984,931 Semiconductor device, method of fabricating the same, and patterning method
A method of fabricating a semiconductor device includes forming first and second active patterns on first and second regions, respectively, of a substrate,...
US-9,984,930 Method for processing a carrier
A method for processing a carrier may include: forming a plurality of structure elements at least one of over and in a carrier, wherein at least two adjacent...
US-9,984,929 Fabricating contacts of a CMOS structure
The invention relates to a method comprising providing a substrate with a channel layer, forming a gate stack structure on the channel layer and forming a...
US-9,984,928 Method for producing a number of chip assemblies and method for producing a semiconductor arrangement
Method for producing chip assemblies that include semiconductor chip arrangements, each semiconductor chip arrangement including a semiconductor chip having a...
US-9,984,927 Method and apparatus for separating semiconductor devices from a wafer
An embodiment method for separating semiconductor devices from a wafer comprises using a carrier which acts an adjustable adhesive force upon the semiconductor...
US-9,984,926 Solution for TSV substrate leakage
A semiconductor device manufacturing method includes providing a wafer, which includes a semiconductor substrate, a semiconductor device located on the...
US-9,984,925 Semiconductor device and method for fabricating the same
A semiconductor device, including a first fin-type pattern; a first gate spacer on the first fin-type pattern, intersecting the first fin-type pattern, and...
US-9,984,924 Semiconductor device and formation thereof
A semiconductor device and method of formation are provided. The semiconductor device comprises a metal plug in a first opening over a substrate, the metal plug...
US-9,984,923 Barrier layers in trenches and vias
A method of forming a semiconductor structure includes forming at least one trench in a dielectric layer, forming a barrier layer on a bottom of said at least...
US-9,984,922 Interconnects having sealing structures to enable selective metal capping layers
Methods of fabricating a capped interconnect for a microelectronic device which includes a sealing feature for any gaps between a capping layer and an...
US-9,984,921 Semiconductor device and method of manufacturing the same
A method of manufacturing a semiconductor device includes forming grooves in a first dielectric layer on a substrate, the first dielectric layer including a...
US-9,984,920 Design-aware pattern density control in directed self-assembly graphoepitaxy process
A method for local pattern density control of a device layout used by graphoepitaxy directed self-assembly (DSA) processes includes importing a multi-layer...
US-9,984,919 Inverted damascene interconnect structures
Interconnect structures and methods of fabricating an interconnect structure. A first section of a mandrel is covered with a feature of an etch mask. A top...
US-9,984,918 Semiconductor structure and manufacturing method thereof
A semiconductor structure includes a semiconductive substrate including a first surface and a second surface opposite to the first surface, a shallow trench...
US-9,984,917 Semiconductor device with an interconnect and a method for manufacturing thereof
A method for manufacturing a semiconductor device in accordance with various embodiments may include: forming an opening in a first region of a semiconductor...
US-9,984,916 Uniform dielectric recess depth during fin reveal
A method for providing a uniform recess depth between different fin gap sizes includes depositing a dielectric material between fins on a substrate. Etch lag is...
US-9,984,915 Semiconductor wafer and method for processing a semiconductor wafer
According to various embodiments, a semiconductor wafer may include: a semiconductor body including an integrated circuit structure; and at least one...
US-9,984,914 Carrier tape
A carrier tape (300) with a continuous channel (310) is proposed instead of the individual separate embossed pockets (110) prevalent in conventional carrier...
US-9,984,913 Tri-modal carrier for a semiconductive wafer
A tri-modal carrier provides a structural platform to temporarily bond a semiconductive wafer and can be used to transport the semiconductive wafer or be used...
US-9,984,912 Locally heated multi-zone substrate support
Embodiments of the present disclosure provide an electrostatic chuck (ESC) having azimuthal temperature control. In one embodiment, the electrostatic chuck...
US-9,984,911 Electrostatic chuck design for high temperature RF applications
An electrostatic chuck includes a puck having a support surface to support a substrate when disposed thereon and an opposing second surface, wherein one or more...
US-9,984,910 Plating apparatus and plating method
A plating apparatus allows a substrate holder to be serviced easily while ensuring easy access to the substrate holder and while a substrate is being processed...
US-9,984,909 System and method for laser scribing a solar panel and the solar panel
The present application discloses methods, and systems for laser-scribing a solar panel and the solar panels. The method for laser-scribing the solar panel may...
US-9,984,908 Temperature control system, semiconductor manufacturing device, and temperature control method
A temperature control system includes a first temperature adjustment unit storing fluid at a first temperature; a second temperature adjustment unit storing...
US-9,984,907 Evacuation method and vacuum processing apparatus
An evacuation method used for a vacuum processing apparatus including a vacuum processing chamber is provided. The vacuum processing chamber is evacuated by an...
US-9,984,906 Plasma processing device and plasma processing method
A plasma processing device includes a processing chamber defining a plasma processing space and a stage for mounting thereon a target substrate in the...
US-9,984,905 Substrate treatment system, substrate transfer method and computer storage medium
An interface station of a coating and developing treatment system has: a cleaning unit cleaning at least a rear surface of a wafer before the wafer is...
US-9,984,904 Substrate treatment system, substrate transfer method and computer storage medium
An interface station of a coating and developing treatment system has: a cleaning unit cleaning at least a rear surface of a wafer before the wafer is...
US-9,984,903 Treatment cup cleaning method, substrate treatment method, and substrate treatment apparatus
A treatment cup cleaning method is provided, which includes: a rotating step of rotating a substrate rotating unit with a substrate being held by the substrate...
US-9,984,902 Apparatus and method for treating substrate
Provided are an apparatus and method for treating a substrate. Specifically, provided are an apparatus and method for treating a substrate through a...
US-9,984,901 Method for making a microelectronic assembly having conductive elements
A method of making a microelectronic assembly can include molding a dielectric material around at least two conductive elements which project above a height of...
US-9,984,900 Semiconductor device including at least one element
A semiconductor device includes a chip, at least one element electrically coupled to the chip, an adhesive at least partially covering the at least one element,...
US-9,984,899 Ceramic package with brazing material near seal member
A ceramic package includes a ceramic substrate, a metallization layer, a first plating layer, a brazing material layer, and a seal member. The ceramic substrate...
US-9,984,897 Method for manufacturing a chip arrangement including a ceramic layer
A chip arrangement is provided, the chip arrangement, including a carrier; a first chip electrically connected to the carrier; a ceramic layer disposed over the...
US-9,984,896 High-purity fluorinated hydrocarbon, use as a plasma etching gas, and plasma etching method
The present invention is a fluorohydrocarbon represented by R--F wherein R represents an isobutyl group or a t-butyl group), the fluorohydrocarbon having a...
US-9,984,895 Chemical mechanical polishing method for tungsten
A process for chemical mechanical polishing a substrate containing tungsten is disclosed to reduce corrosion rate and inhibit dishing of the tungsten and...
US-9,984,894 Forming SiC MOSFETs with high channel mobility by treating the oxide interface with cesium ions
Methods of forming a semiconductor structure include providing an insulation layer on a semiconductor layer and diffusing cesium ions into the insulation layer...
US-9,984,893 Fin cut for taper device
A method of making a semiconductor device includes patterning a fin in a substrate; performing a first etching process to remove a portion of the fin to cut the...
US-9,984,892 Oxide film removing method, oxide film removing apparatus, contact forming method, and contact forming system
Disclosed is a method for removing, from a target substrate having an insulating film with a predetermined pattern formed thereon, a silicon-containing oxide...
US-9,984,891 Method for forming organic film and method for manufacturing substrate for semiconductor apparatus
The present invention provides a method for forming an organic film, including: forming a coating film by spin coating of an organic film-forming composition...
US-9,984,890 Isotropic silicon and silicon-germanium etching with tunable selectivity
Isotropic silicon and silicon-germanium etching with tunable selectivity is described. The method includes receiving a substrate having a layer of silicon and a...
US-9,984,889 Techniques for manipulating patterned features using ions
A method may include providing a surface feature on a substrate, the surface feature comprising a feature shape a feature location, and a dimension along a...
US-9,984,888 Method of fabricating a semiconductor wafer including a through substrate via (TSV) and a stepped support ring...
A semiconductor wafer having a plurality of through substrate vias (TSVs) is disclosed. The semiconductor wafer includes a stepped support ring on an outer edge...
US-9,984,887 Method of manufacturing a semiconductor device
A method of manufacturing a semiconductor device includes: forming a film on a substrate by time-divisionally and sequentially performing: (a) supplying a...
US-9,984,886 Semiconductor devices and methods of manufacturing the same
A semiconductor device includes a gate structure extending in a second direction on a substrate, a source/drain layer disposed on a portion of the substrate...
US-9,984,885 Non-volatile memory device and method for fabricating the same
A non-volatile memory device may include a first well of a first conductive type formed over a substrate, a second well of a second conductive type formed over...
US-9,984,884 Method of manufacturing semiconductor device with a multi-layered gate dielectric
A method of manufacturing a semiconductor device includes forming a first nitride semiconductor layer, forming thereover a second nitride semiconductor layer...
US-9,984,883 Devices with multiple threshold voltages formed on a single wafer using strain in the high-k layer
A method for adjusting a threshold voltage includes depositing a strained liner on a gate structure to strain a gate dielectric. A threshold voltage of a...
US-9,984,882 Semiconductor structures and fabrication method thereof
A method for fabricating a semiconductor structure includes providing a substrate, forming an interface layer on the substrate, and then performing a first...
US-9,984,881 Methods of fabricating semiconductor devices including implanted regions for providing low-resistance contact...
Methods of fabricating a semiconductor device include forming a first semiconductor layer of a first conductivity type and having a first dopant concentration,...
← Previous | 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 | Next →

File A Patent Application

  • Protect your idea -- Don't let someone else file first. Learn more.

  • 3 Easy Steps -- Complete Form, application Review, and File. See our process.

  • Attorney Review -- Have your application reviewed by a Patent Attorney. See what's included.