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Patent # Description
US-1,000,8432 Semiconductor device, manufacturing method thereof, and electronic apparatus
A semiconductor device includes a substrate and a semiconductor element mounted on the top surface of the substrate. On the top surface of the substrate, one or...
US-1,000,8430 Semiconductor device, manufacturing apparatus for semiconductor device and manufacturing method for...
A semiconductor device includes: a semiconductor element; a frame which has a first surface, holds the semiconductor element on the first surface, and is...
US-1,000,8429 Semiconductor device and semiconductor device measuring method
A semiconductor device reduces measurement time. The semiconductor device according to an embodiment of the invention includes: plural series-coupled resistance...
US-1,000,8428 Methods for depositing films on sensitive substrates
Methods and apparatus to form films on sensitive substrates while preventing damage to the sensitive substrate are provided herein. In certain embodiments,...
US-1,000,8427 Scanning acoustic microscope sensor array for chip-packaging interaction package reliability monitoring
A method includes forming a flip-chip module including a chip connected to a substrate with a layer of underfill material adhered to the chip and the substrate;...
US-1,000,8426 Etching method and etchant
An etching method for detecting crystal defects, the method includes providing a substrate with an etchant containing hydrogen fluoride, nitric acid, hydrogen...
US-1,000,8425 Mitigating electromigration, in-rush current effects, IR-voltage drop, and jitter through metal line and via...
Integrated circuits and methods of manufacturing such circuits are disclosed herein that feature metal line-via matrix insertion after place and route processes...
US-1,000,8424 Measuring device and method for measuring layer thicknesses and defects in a wafer stack
A method for measuring and/or acquiring layer thicknesses and voids of one or more layers of a temporary bonded wafer stack on a plurality of measuring points...
US-1,000,8423 Transistor work function adjustment by laser stimulation
Methods and apparatuses for modifying a work function of transistors included in an integrated circuit are disclosed. A tester unit may be configured to test an...
US-1,000,8422 Method for assessing the usability of an exposed and developed semiconductor wafer
An apparatus and a method for analysis of processing of a semiconductor wafer is disclosed which comprises gathering a plurality of items of processing data,...
US-1,000,8421 Capacitance monitoring using x-ray diffraction
A method includes measuring a difference between a primary X-ray diffraction peak and a secondary X-ray diffraction peak, the primary X-ray diffraction peak...
US-1,000,8420 Embedded SiGe epitaxy test pad
Techniques for measuring and testing a semiconductor wafer during semiconductor device fabrication include designating a test area on the top surface of the...
US-1,000,8419 Separation method, computer storage medium, and separation system
A superposed wafer is separated to a processing target wafer and a supporting wafer while being heated. Then, an adhesive on a joint surface of the processing...
US-1,000,8418 Method of semiconductor integrated circuit fabrication
A method of semiconductor device fabrication includes providing a substrate including a first fin element and a second fin element extending from the substrate....
US-1,000,8417 Vertical transport fin field effect transistors having different channel lengths
A method of forming multiple vertical transport fin field effect transistors (VT FinFETs) having different channel lengths, including, forming a vertical fin on...
US-1,000,8416 Forming a protective layer to prevent formation of leakage paths
A gate structure is formed over a substrate. The gate structure includes a gate electrode and a hard mask located over the gate electrode. The hard mask...
US-1,000,8415 Gate structure cut after formation of epitaxial active regions
A gate structure straddling a plurality of semiconductor material portions is formed. Source regions and drain regions are formed in the plurality of...
US-1,000,8414 System and method for widening Fin widths for small pitch FinFET devices
A FinFET includes a semiconductor layer having a fin structure that protrudes out of the semiconductor layer. The fin structure includes a first segment and a...
US-1,000,8413 Wafer level dicing method
Disclosed herein is a method for dicing a wafer, the method comprising forming a molding compound layer over each of one or more dies disposed on a wafer, the...
US-1,000,8412 Doping control of metal nitride films
Described are methods for controlling the doping of metal nitride films such as TaN, TiN and MnN. The temperature during deposition of the metal nitride film...
US-1,000,8411 Parallel plate waveguide for power circuits
A power semiconductor package includes a first group of semiconductor dies attached to a first side of a substrate and evenly distributed over a width of the...
US-1,000,8410 Deposition apparatus including UV annealing unit and method for fabricating non-volatile memory device by using...
A deposition apparatus includes a chamber, a plate in the chamber and configured support a substrate, a deposition unit configured to perform a deposition...
US-1,000,8409 Method for fabricating a semiconductor device
A method for fabricating semiconductor device includes the steps of: forming a dielectric layer on a substrate; forming a stop layer between the dielectric...
US-1,000,8408 Devices and methods of forming asymmetric line/space with barrierless metallization
Devices and methods of fabricating integrated circuit devices for forming assymetric line/space with barrierless metallization are provided. One method...
US-1,000,8407 Methods of manufacturing semiconductor devices including conductive structures
A method of forming a semiconductor device can include forming an insulation layer using a material having a composition selected to provide resistance to...
US-1,000,8406 Adhesive sheet for laser dicing and method for manufacturing semiconductor device
An adhesive sheet for laser dicing is provided that is capable of, in laser dicing by irradiation with laser light through the adhesive sheet, suppressing laser...
US-1,000,8405 Expansion method, method for manufacturing semiconductor device, and semiconductor device
An embodiment of the present invention relates to an expansion method comprising: a step (I) of preparing a laminate having a semiconductor wafer in which...
US-1,000,8404 Electrostatic chuck assembly for high temperature processes
An electrostatic chuck assembly includes a puck and a cooling plate. The puck includes an electrically insulative upper puck plate comprising one or more...
US-1,000,8403 Apparatus for processing continuous lengths of flexible foil
An apparatus and method are described that use a cylindrical drum type vacuum drum and allows accurately registered, high resolution laser patterning of thin...
US-1,000,8402 Vertical wafer boat
A vertical wafer boat includes a top plate, a bottom plate, three support posts, and wafer support parts. The support posts include a first and a second support...
US-1,000,8401 Wafer boat having dual pitch
A wafer boat is provided for holding a plurality of wafers in a vertically stacked and spaced relationship. The wafer boat comprises a top member; a bottom...
US-1,000,8400 Substrate processing device and method of manufacturing semiconductor device
A substrate processing device capable of stabilizing an etching amount of a metal film provided on a substrate is provided. The substrate processing device...
US-1,000,8399 Electrostatic puck assembly with metal bonded backing plate for high temperature processes
An electrostatic puck assembly includes an upper puck plate, a lower puck plate and a backing plate. The upper puck plate comprises AlN or Al.sub.2O.sub.3 and...
US-1,000,8398 Substrate thinning apparatus, method of thinning substrate by using the same, and method of fabricating...
A substrate thinning apparatus includes a chuck table capable of supporting a substrate, a rotatable grinding device which includes a wheel tip capable of...
US-1,000,8397 Pneumatic wafer expansion
A die expansion tool and method for expanding foil of a foil carrier connected to a frame is disclosed. In the embodiment, the die expansion tool has an inner...
US-1,000,8396 Method for collapse-free drying of high aspect ratio structures
A method for drying a substrate including a plurality of high aspect ratio (HAR) structures includes, after at least one of (i) wet etching, and (ii) wet...
US-1,000,8395 Stacked semiconductor die assemblies with high efficiency thermal paths and molded underfill
Semiconductor die assemblies having high efficiency thermal paths and molded underfill material. In one embodiment, a semiconductor die assembly comprises a...
US-1,000,8394 Method for mounting an electrical component, wherein a hood is used, and hood suitable for use in said method
A method for mounting an electrical component to a substrate may include mounting the component onto the substrate, forming a cover including a thermally...
US-1,000,8393 Semiconductor device and manufacturing method thereof
A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this...
US-1,000,8392 Method for producing a power semiconductor module
A power semiconductor module is produced by: providing an electrically conductive terminal block having a screw thread, a connecting conductor having first and...
US-1,000,8391 Method of forming copper interconnects
A method of forming copper interconnects includes: depositing a dielectric layer on a silicon wafer substrate; forming vias and/or trenches in the dielectric...
US-1,000,8390 Manufacturing method of semiconductor device and semiconductor manufacturing apparatus
A manufacturing method of a semiconductor device according to an embodiment implants impurities into a central portion of a polishing target film or an outer...
US-1,000,8389 Methods of manufacturing vertical memory devices at an edge region
A method of manufacturing a vertical memory device includes forming a preliminary first mold structure on a substrate, which includes main and edge regions, and...
US-1,000,8388 Device conformity control by low temperature, low pressure, inductively coupled ammonia-nitrogen trifluoride plasma
The present disclosure generally relates to methods of removing oxides and oxide-containing layers from the surfaces of substrates. In one aspect, a method of...
US-1,000,8387 Embedded memory in back-end-of-line low-k dielectric
A low-k dielectric layer, such as SiCOH, with high and stable chemical mechanical polishing (CMP) removal rate (RR) is disclosed. The polishing rate enhancer...
US-1,000,8386 Formation of pure silicon oxide interfacial layer on silicon-germanium channel field effect transistor device
Methods are provided to form pure silicon oxide layers on silicon-germanium (SiGe) layers, as well as an FET device having a pure silicon oxide interfacial...
US-1,000,8385 Enlarged sacrificial gate caps for forming self-aligned contacts
Methods of forming a sacrificial gate cap and a self-aligned contact for a device structure. A gate electrode is arranged between a first sidewall spacer and a...
US-1,000,8384 Techniques to engineer nanoscale patterned features using ions
A method of patterning a substrate. The method may include providing a surface feature on the substrate, the surface feature having a first dimension along a...
US-1,000,8383 Semiconductor structure and manufacturing method thereof
The present disclosure provides a semiconductor structure includes a substrate and an epitaxy region that is partially disposed in the substrate. A doping...
US-1,000,8382 Semiconductor device having a porous low-k structure
The present disclosure involves forming a porous low-k dielectric structure. A plurality of conductive elements is formed over the substrate. The conductive...
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