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Patent # Description
US-1,001,4904 System and method for mitigating co-channel interference in white space modems
Disclosed is a system for mitigating co-channel interference (CCI) caused due to narrow multiband signal in white space (WS) modems. The system includes a...
US-1,001,4903 Non-reciprocal transmission apparatus with different backward and forward propagation constants, provided for...
In a circularly polarized wave antenna apparatus including a non-reciprocal transmission line apparatus having forward and backward propagation constants...
US-1,001,4902 High-frequency module
A high-frequency module includes a directivity switching switch unit that switches an end portion of a first sub line, which is connected to an output terminal,...
US-1,001,4901 Fully integrated complete multi-band RF frontend system integrated circuit (IC) chip
According to one embodiment, an RF frontend IC device includes a first RF transceiver to transmit and receive RF signals within a first predetermined frequency...
US-1,001,4900 Wi-Fi adaptive transmit antenna selection
Wireless communication devices (UEs) may include multiple receive (RX) chains and associated antennas, and at least one transmit (TX) chain co-located with one...
US-1,001,4899 System and method for built-in self-test of electronic circuits
In described examples of a device with built-in-self-test, a multiplexer has at least first and second input terminals and is coupled to receive a first input...
US-1,001,4898 Housing assembly
A radio housing (100) is formed of a front plate (102) having screw mount receptacles (222, 223, 224, 228, 229, 230) and first and second side plates (104,...
US-1,001,4897 Proximal user detection with measurement receiver
A method, communication device, and computer program product mitigate Specific Absorption Rating (SAR) exposure to a user proximate to a communication device....
US-1,001,4896 Dual receive processing in wireless communications
A technique, as well as select implementations thereof, pertaining to dual receive processing in wireless communications is described. The technique may involve...
US-1,001,4895 Receiver, radio communication device, and radio communication method
A receiver has an oscillator to output an oscillation signal, a receiver to perform reception processing of a reception signal, a phase frequency detector to...
US-1,001,4894 Down-conversion circuit
A down-conversion circuit for a receiver circuit is disclosed, the down-conversion circuit comprises a first passive switching mixer arranged to down-convert a...
US-1,001,4893 Receiver circuit
A receiver circuit comprising a beamformer and an MRC-block. The beamformer configured to: apply combination-weighting-values to a first-BF-input-signal and a...
US-1,001,4892 System and method for mitigating electronic interference
A communication system (200) is formed of a base station comprising a main base station receiver with a main base station antenna (202) and a secondary receiver...
US-1,001,4891 Scheduling method and apparatus in wireless communication system
The present disclosure relates to a 5G or pre-5G communication system to be provided for supporting a higher data transfer rate beyond a 4G communication system...
US-1,001,4890 Preparing transmission signals for transmission
It is presented a method for determining how to prepare transmission signals for transmission. The method is performed in a transmitter device and comprises the...
US-1,001,4889 Front end architecture with filters having different out of band attenuation
In an embodiment, an apparatus includes a first transmit path, a second transmit path, and a switch element. The first transmit path can provide a first radio...
US-1,001,4888 Jitter improvement in serializer-deserializer (SerDes) transmitters
Systems and methods are provided for jitter improvement in serializer-deserializer (SerDes) transmitters. One or more adjustments may be applied in SerDes...
US-1,001,4887 Outphasing transmitters with improved wireless transmission performance and manufacturability
An outphasing transmitter includes a decomposition block, first and second power amplifiers, and antennas in a phased array antenna panel. The decomposition...
US-1,001,4886 Reducing power amplifier gain drift during a data burst
A bias circuit provides additional bias current for power amplifiers during data bursts to compensate for the gain droop caused by a rise in the power amplifier...
US-1,001,4885 Method and apparatus for cooling a telecommunication device
An apparatus for cooling a telecommunication device includes a controller, a first cooling unit, a second cooling unit, and at least one sensor. The first...
US-1,001,4884 Analog modulated repeater/transceiver
An analog transceiver having low latency for processing a received RF/MW signal and modifying the received RF/MW signal into a modified RF/MW signal prior to...
US-1,001,4883 Radio frequency transmitters having redundant signal paths and monitoring circuitry for detecting signal loss
Radio frequency ("RF") transmitters include a digital-to-RF electronics module that receives an input data stream and outputs an RF signal, a switch having a...
US-1,001,4882 Method and apparatus for fast prototyping of wireless transceivers
An electronic object is configured for rapid prototyping of a wireless communication transceiver. The electronic object comprises hardware and software...
US-1,001,4881 Multiple erasure codes for distributed storage
Embodiments relate to dynamically selecting an erasure code. State data is tracked to ascertain frequency of file access. One of at least two erasure codes are...
US-1,001,4880 Coding and decoding method and device, and system
Embodiments of the present disclosure provide an FEC coding and decoding method and device, and a system. A transmit end determines a forward error correction...
US-1,001,4879 Capacitance-to-digital converter
A method for measuring capacitance may include integrating charge with a charge integrator having a charge integrator input and output, filtering, with a loop...
US-1,001,4878 Metastability compensation
A data processor is disclosed. The data processor includes a data processing module. The data processing modules includes an input for receiving an input...
US-1,001,4877 Multi-segmented all logic DAC
A digital-to-analog converter (DAC) includes a plurality of segments, wherein the plurality of segments includes a first segment electronically coupled to each...
US-1,001,4876 High speed buffering for time-interleaved ADCS with reduced ISI and increased voltage gain
System and method of buffering sampled signals in a time-interleaved analog-to-digital converter (ADC). When the input voltage to the buffer varies to a...
US-1,001,4875 Analog-to-digital converter
An analog-to-digital converter including a converter arrangement configured to provide a digital output signal as an output of the analog-to-digital converter...
US-1,001,4874 System and method of minimizing differential non-linearity (DNL) for high resolution current steering DAC
A current steering converter fabricated using a predetermined integrated circuit technology includes a unary portion having one or more current sources and a...
US-1,001,4873 Resistor ladder digital-to-analog converter with mismatch correction and method therefor
A digital-to-analog converter (DAC) includes a plurality of resistive elements connected together in series to form a ring of resistive elements. A node is...
US-1,001,4872 Universal input and output interface
Provided is programmable circuit for interfacing with a field device. The circuit includes only one analog-to-digital converter (ADC) configured to receive from...
US-1,001,4871 Asynchronous successive approximation analog-to-digital converter and related methods and apparatus
An ultrasound device including an asynchronous successive approximation analog-to-digital converter and method are provided. The device includes at least one...
US-1,001,4870 Micro-electro-mechanical systems (MEMS), apparatus, and operating methods thereof
A method that comprises converting a first electrical signal to a second electrical signal using a converter coupled between a micro-mechanical structure and an...
US-1,001,4869 Fractional clock generator with ramp control including fixed time interval and coarse/fine frequency change steps
A clock signal generator including a fractional clock divider and a frequency ramp control circuit. The fractional clock divider is configured to generate an...
US-1,001,4868 Injection-locked phase interpolator
An example phase interpolator includes: a ring oscillator having a plurality of delay stages and a plurality of injection switches, each of the plurality of...
US-1,001,4867 Low-jitter phase-locked loop circuit
A phase-locked loop circuit includes (a) a phase frequency detector which receives the input signal of the phase-locked loop and a feedback signal that is...
US-1,001,4866 Clock alignment scheme for data macros of DDR PHY
A master-slave delay locked loop system comprises a master delay locked loop ("MDLL") for generating at least one bias voltage and at least one slave delay...
US-1,001,4865 Clock management block
A novel integrated circuit (IC) that configurably distributes clocks from multiple clock sources to multiple sets of circuits is described. The IC includes...
US-1,001,4864 Wide operating level shifters
Aspects of wide operating range level shifter designs are described. One embodiment includes a level shifter configured to receive an input signal in a first...
US-1,001,4863 Device and method for voltage boosting and display panel driver incorporating the same
An integrated circuit device boosts an output voltage which is to be boosted based on the reference power supply voltage, based on another power supply voltage...
US-1,001,4862 Clock gating circuit operates at high speed
A clock gating circuit includes a first precharge unit charging a first node based on a clock signal, a second precharge unit charging a second node based on...
US-1,001,4861 Level shifters, memory systems, and level shifting methods
Level shifters, memory systems, and level shifting methods are described. According to one arrangement, a level shifter includes an input configured to receive...
US-1,001,4860 On-die termination
Local on-die termination controllers for effecting termination of a high-speed signaling links simultaneously engage on-die termination structures within...
US-1,001,4859 Incorporating arrays of josephson junctions in a josephson junction ring modulator in a josephson parametric...
A Josephson parametric converter is provided. The Josephson parametric converter includes a multi-Josephson junction ring modulator having arrays of N Josephson...
US-1,001,4858 High speed switching solid state relay circuit
A switching circuit includes a bridge rectifier to receive voltage inputs across a load and an optical isolator to receive a logic input signal and generate an...
US-1,001,4857 Signal output circuit
A signal output circuit includes a signal conversion element, a signal output transistor, a first resistor element, a second resistor element, a diode, a...
US-1,001,4856 Signal transmission device
This invention, is concerning a signal voltage device, in which transformers 22a, 22b and a reception circuit 24 are formed on the same chip, and accordingly,...
US-1,001,4855 Electric power conversion circuit including switches and bootstrap circuits, and electric power transmission...
An electric power conversion circuit includes: first through fourth port terminals; a first diode having an anode connected to the first port terminal; a second...
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