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Patent # Description
US-1,001,4403 Semiconductor device
A semiconductor device includes a first nitride semiconductor layer formed over a substrate, a second nitride semiconductor layer formed over the first nitride...
US-1,001,4402 High electron mobility transistor (HEMT) device structure
A high electron mobility transistor (HEMT) device structure is provided. The HEMT device structure includes a channel layer formed over a substrate and an...
US-1,001,4401 Semiconductor device with passivation layer for control of leakage current
A semiconductor device includes a semiconductor structure including a substrate, a first semiconductor layer on the substrate, and a second semiconductor layer...
US-1,001,4400 Semiconductor device having a defined oxygen concentration
A semiconductor device includes: a semiconductor substrate having a first side, a second side opposite the first side, and a thickness; at least one...
US-1,001,4399 Hetero-junction bipolar transistor and electric device
This hetero-junction bipolar transistor includes a first n-type GaN layer, an Al.sub.xGa.sub.1-xN layer (0.1.ltoreq.x.ltoreq.0.5), an undoped GaN layer having a...
US-1,001,4398 Bipolar transistor device and method of fabrication
The disclosure relates to bipolar transistor devices and a method of fabricating the same. The device comprises a field plate, in an isolation region adjacent...
US-1,001,4397 Bipolar junction transistors with a combined vertical-lateral architecture
Device structures and fabrication methods for a bipolar junction transistor. The device structure includes an intrinsic base, an emitter having a vertical...
US-1,001,4396 Spin control electronic device operable at room temperature
A spin control electronic device operable at room temperature according to an embodiment of the present invention includes a transfer channel that includes a...
US-1,001,4395 Fin tunnel field effect transistor (FET)
A fin tunnel field effect transistor includes a seed region and a first type region disposed above the seed region. The first type region includes a first...
US-1,001,4394 Structure and formation method of semiconductor device with metal gate
Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a fin structure over a...
US-1,001,4393 Semiconductor device and method of manufacturing the same
A method of manufacturing semiconductor device includes forming a plurality of sacrificial layers and a plurality of semiconductor layers repeatedly and...
US-1,001,4392 Laterally diffused metal-oxide-semiconductor field-effect transistor
Provided is a laterally diffused metal-oxide-semiconductor field-effect transistor, comprising a substrate (110), a source (150), a drain (140), a body region...
US-1,001,4391 Vertical transport field effect transistor with precise gate length definition
Techniques relate to a gate stack for a semiconductor device. A vertical fin is formed on a substrate. The vertical fin has an upper portion and a bottom...
US-1,001,4390 Inner spacer formation for nanosheet field-effect transistors with tall suspensions
Structures for a nanosheet field-effect transistor and methods for forming a structure for a nanosheet field-effect transistor. A body feature is formed that...
US-1,001,4389 Methods of forming IC products comprising a nano-sheet device and a transistor device having first and second...
One illustrative method disclosed herein includes, among other things, forming channel semiconductor material for a nano-sheet device and a transistor device,...
US-1,001,4388 Transient voltage suppression devices with symmetric breakdown characteristics
The present disclosure relates to a symmetrical, punch-through transient voltage suppression (TVS) device includes a mesa structure disposed on a semiconductor...
US-1,001,4387 Semiconductor structure with multiple transistors having various threshold voltages
A semiconductor structure includes first, second, and third transistor elements each having a first screening region concurrently formed therein. A second...
US-1,001,4386 Method of manufacturing a transistor
There is provided a method for manufacturing a transistor including a gate above an underlying layer of a semiconductor material and including at least one...
US-1,001,4385 Manufacturing method of semiconductor device and semiconductor device
The thickness of an insulating film, which will serve as an offset spacer film and is formed in an offset monitor region, is managed as the thickness of an...
US-1,001,4384 Method for manufacturing insulated gate field effect transistor
An insulated gate field effect transistor with (a) a base having source/drain regions, a channel forming region, a gate insulating film formed on the channel...
US-1,001,4383 Method for manufacturing a semiconductor device comprising a metal nitride layer and semiconductor device
A method of manufacturing a semiconductor device includes introducing nitrogen into a metal layer or into a metal nitride layer, the metal layer or metal...
US-1,001,4382 Semiconductor device with sidewall passivation and method of making
One or more semiconductor devices are provided. The semiconductor device comprises a gate body, a conductive prelayer over the gate body, at least one inhibitor...
US-1,001,4381 Semiconductor power devices manufactured with self-aligned processes and more reliable electrical contacts
This invention discloses semiconductor power device that includes a plurality of top electrical terminals disposed near a top surface of a semiconductor...
US-1,001,4380 Memory first process flow and device
A semiconductor device and method of making the same are disclosed. The semiconductor device includes a memory gate on a charge storage structure formed on a...
US-1,001,4379 Methods of forming semiconductor device with self-aligned contact elements and the resulting device
One method disclosed includes forming a final gate structure in a gate cavity that is laterally defined by sidewall spacers, removing a portion of the sidewall...
US-1,001,4378 Semiconductor device, method of manufacturing semiconductor device, inverter circuit, driving device, vehicle,...
A semiconductor device according to an embodiment includes a silicon carbide layer, an insulating layer, and a region provided between the silicon carbide layer...
US-1,001,4377 III-V field effect transistor on a dielectric layer
An electrical device comprising a base semiconductor layer of a silicon including material; a dielectric layer present on the base semiconductor layer; a first...
US-1,001,4376 Silicon carbide semiconductor device having a trench with side walls and method for manufacturing same
A silicon carbide semiconductor device includes: a silicon carbide off substrate including a main surface having an off angle relative to a basal plane, the...
US-1,001,4375 III-nitride based semiconductor structure
A III-nitride based semiconductor structure includes a substrate; a buffer layer disposed above the substrate; a first gallium nitrite (GaN) layer disposed...
US-1,001,4374 Planar heterogeneous device
In an embodiment a second semiconductor layer is transferred (e.g., using layer transfer techniques) on top of a first semiconductor layer. The second layer is...
US-1,001,4373 Fabrication of semiconductor junctions
Methods are provided for fabricating a semiconductor junction. A first semiconductor structure is selectively grown in a nanotube, which extends laterally over...
US-1,001,4372 Vertical gate-all-around transistor with top and bottom source/drain epitaxy on a replacement nanowire, and...
After providing a Group IV semiconductor nanowire on a substrate, a sacrificial material portion is formed on sidewalls of a bottom portion of the Group IV...
US-1,001,4371 Stressed nanowire stack for field effect transistor
A disposable gate structure is formed over the alternating stack of first semiconductor material portions and second semiconductor material portions. The second...
US-1,001,4370 Air gap adjacent a bottom source/drain region of vertical transistor device
One illustrative method disclosed herein includes, among other things, forming an initial bottom spacer above a semiconductor substrate and adjacent a...
US-1,001,4369 Super-junction semiconductor device
A super junction semiconductor device is provided. The super-junction semiconductor device includes a substrate, a drift layer disposed on the substrate, an...
US-1,001,4368 Semiconductor device and manufacturing method of semiconductor device
An IGBT region includes a collector layer, a first drift layer, a first body layer, an emitter layer, and a trench gate reaching the first drift layer through...
US-1,001,4367 Semiconductor device including an edge construction with straight sections and corner sections
A semiconductor device includes a transistor cell area with active transistor cells including source zones electrically connected to a first load electrode. The...
US-1,001,4366 Tapered polysilicon gate layout for power handling improvement for radio frequency (RF) switch applications
A radio frequency (RF) switch includes a plurality of series-connected silicon-on-insulator (SOI) CMOS transistors, including a plurality of parallel...
US-1,001,4365 Power semiconductor devices, methods, and structures with embedded dielectric layers containing permanent charges
Power devices using refilled trenches with permanent charge at or near their sidewalls. These trenches extend vertically into a drift region.
US-1,001,4364 On-chip resistors with a tunable temperature coefficient of resistance
Device structures and fabrication methods for an on-chip resistor. A first Seebeck terminal is arranged to overlap with first and second resistor bodies of the...
US-1,001,4363 Semiconductor device having resistance elements and fabrication method thereof
A semiconductor device includes as a resistance element a first polycrystalline silicon and a second polycrystalline silicon containing impurities, such as...
US-1,001,4362 Display device including metal layer and metal carbide layer covering the metal layer
A display device is disclosed. In one aspect, the display device includes a substrate including a display area and a non-display area and an input wiring...
US-1,001,4361 Organic light emitting display device
Disclosed is an organic light emitting display device which includes an auxiliary line connected to a first power line and an auxiliary electrode connected to a...
US-1,001,4360 Array substrate comprising a power wire layer and manufacturing method thereof
The present invention provides an array substrate and a manufacturing method thereof. The array substrate of the present invention comprises multiple pixel...
US-1,001,4359 Organic light emitting diode display device and method for manufacturing the same
An organic light emitting diode display device is disclosed which includes: scan, data and power lines crossing one another and arranged to define a pixel...
US-1,001,4358 Organic light emitting display having a first insulating layer and a gate metal layer constitute a first capacitor
Organic light-emitting display is disclosed. The organic light-emitting display includes a first substrate, a semiconductor layer positioned on the first...
US-1,001,4357 Organic light-emitting device and organic light-emitting display device using the same
An organic light-emitting device, including: an anode and a cathode opposite each other, a first stack and a second stack between the anode and the cathode, and...
US-1,001,4356 Organic light-emitting diode display
An organic light-emitting diode display is disclosed. In one aspect, the display includes a substrate having a flexible portion configured to bend or fold, a...
US-1,001,4355 Pixel circuit and display device, and a method of manufacturing pixel circuit
The display device including a pixel circuit has a first line, a transistor, a light emitting element, and a second line. The transistor is located between the...
US-1,001,4354 Organic EL element, organic EL display panel using same, and organic EL display panel manufacturing method
An organic EL display panel in which pixels are arranged in a matrix, including: light-emitting layers disposed above pixel electrode layers in intervals...
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