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Patent # Description
US-1,001,4343 Pixel structure, display substrate and display device
A pixel structure, a display substrate and a display device are disclosed. The pixel structure comprises a plurality of first pixels, second pixels and third...
US-1,001,4342 LED filament and lamp
A LED filament includes LED chips, a first bracket and a second bracket. The LED chips are secured on the first bracket and/or the second bracket. The first...
US-1,001,4341 Optical fingerprint identification module
An optical fingerprint identification module includes a casing, an image pickup assembly, a light-guiding diffusion layer, a light-collecting reflective layer,...
US-1,001,4340 Stacked SPAD image sensor
The present disclosure relates to a stacked SPAD image sensor with a CMOS Chip and an imaging chip bonded together, to improve the fill factor of the SPAD image...
US-1,001,4339 Image sensors and methods of forming the same
An image sensor includes a substrate including a light-receiving region and a light-shielding region, a device isolation pattern in the substrate of the...
US-1,001,4338 Image sensor
An image sensor includes multiple unit pixels defined by a pixel isolation layer on a substrate, at least a pair of photoelectric converters in each of the unit...
US-1,001,4337 Method of manufacturing a nanostructured spectral filter
A spectral filter is manufactured using a process wherein a first rectangular bar is formed within a first layer made of a first material, said first...
US-1,001,4336 Imagers with depth sensing capabilities
An imager may include depth sensing pixels that provide an asymmetrical angular response to incident light. The depth sensing pixels may each include a...
US-1,001,4335 Solid-state imaging device and camera module
A solid-state imaging device includes: a color filter layer which includes filters disposed above light receiving portions of a semiconductor substrate in...
US-1,001,4334 Imaging device, module, and electronic device
An object is to provide an imaging device with high efficiency of transferring charge corresponding to imaging data. The imaging device includes first to fifth...
US-1,001,4333 Back-side illuminated pixels with interconnect layers
An imaging pixel may be provided with an upper substrate layer, a lower substrate layer, a floating diffusion region in the upper substrate layer, and a...
US-1,001,4332 Pixel circuit, semiconductor photodetection device, and radiation counting device
In a photoelectric changing unit, a photoelectric conversion unit converts light into electric charge, and an electric charge accumulation unit accumulates the...
US-1,001,4331 Field-effect transistor devices having proximity contact features
Field-effect transistor (FET) devices are described herein that include an insulator layer, a field-effect transistor implemented over the insulator layer, a...
US-1,001,4330 Array substrate, method for fabricating the same, and display apparatus containing the same
The present disclosure provides an array substrate, including: a plurality of gate lines and a plurality of data lines intersecting with one another for...
US-1,001,4329 Array substrate with thin film transistor and method of manufacturing the same
An array substrate and manufacturing method thereof and display device are provided. The method of manufacturing the array substrate includes forming a pattern...
US-1,001,4328 TFT array substrate
A TFT array substrate includes a display zone having data lines, scan lines, and sub-pixels arranged in an array. For the sub-pixels of the same row, each of...
US-1,001,4327 Thin film transistor array substrate, display panel and display device
A thin film transistor array substrate for a display device generally includes: a substrate; a plurality of gate lines and a plurality of data lines arranged on...
US-1,001,4326 Method for fabricating array substrate, array substrate and display device
A method for fabricating an array substrate, an array substrate and a display device are provided. The method for fabricating the array substrate includes:...
US-1,001,4325 Semiconductor device and electronic device
A semiconductor device which can retain data for a long period is provided. The semiconductor device includes a memory circuit and a retention circuit. The...
US-1,001,4324 Thin film transistor, with shaped base device, electronic apparatus and method of manufacturing thin film...
Provided is a thin film transistor, including: a base that includes, on an upper surface, a first region and a second region; a gate electrode that is provided...
US-1,001,4323 Array substrate, curved display panel and curved display device
An array substrate, a curved display panel and a curved display device are provided, to improve visual effect and image quality of the display panel being...
US-1,001,4322 Local SOI fins with multiple heights
A semiconductor structure is provided that contains silicon fins having different heights, while maintaining a reasonable fin height to width ratio for process...
US-1,001,4321 Radio-frequency switches having silicon-on-insulator field-effect transistors with reduced linear region resistance
Disclosed are devices and methods related to radio-frequency (RF) switches having silicon-on-insulator (SOI) field-effect transistors (FETs). In some...
US-1,001,4320 Semiconductor integrated circuit device
A semiconductor integrated circuit device having a control signal system for avoiding failure to check an indefinite signal propagation prevention circuit, for...
US-1,001,4319 Conductive components and memory assemblies
Some embodiments include a memory assembly having memory cells proximate a conductive source. Channel material extends along the memory cells and is...
US-1,001,4318 Semiconductor memory device, structure and methods
A multilevel semiconductor device, including: a first level including a first array of first memory cells; a second level including a second array of second...
US-1,001,4317 Three-dimensional non-volatile NOR-type flash memory
The present invention provides a design of three-dimensional non-volatile NOR flash memory devices consisting of arrays of basic NOR memory group in which...
US-1,001,4316 Three-dimensional memory device with leakage reducing support pillar structures and method of making thereof
Memory openings and support openings can be formed through an alternating stack of insulating layers and sacrificial material layers. A set of dielectric layers...
US-1,001,4315 Non-volatile memory devices with vertically integrated capacitor electrodes
Provided is a vertical non-volatile memory device in which a capacitor constituting a peripheral circuit region is formed as a vertical type so that an area...
US-1,001,4314 Semiconductor device and methods of manufacture thereof
The invention provides a method for use in forming a semiconductor device, the semiconductor device comprising a primary area and a periphery area, the method...
US-1,001,4313 Semiconductor device and method of manufacturing the same
Provided herein is a semiconductor device. The semiconductor device may include conductive layers each including a line, and a pad which is coupled with the...
US-1,001,4312 Semiconductor integrated circuit device and a method of manufacturing the same
A semiconductor device including a memory cell featuring a first gate insulating film over a semiconductor substrate, a control gate electrode over the first...
US-1,001,4311 Methods of forming an array of elevationally-extending strings of memory cells, methods of forming polysilicon,...
A method of forming poly silicon comprises forming a first polysilicon-comprising material over a substrate, with the first polysilicon-comprising material...
US-1,001,4310 Memory cell structure and operation method thereof
A method for operating a memory cell structure includes providing a memory cell. An erasing process is performed by applying an erasing voltage to a first gate...
US-1,001,4309 Methods of forming an array of elevationally-extending strings of memory cells comprising a programmable charge...
An array of elevationally-extending strings of memory cells, where the memory cells individually comprise a programmable charge storage transistor, comprises a...
US-1,001,4308 Electronic chip manufacturing method
Active areas of memory cells and active areas of transistors are delimited in an upper portion of a wafer. Floating gates are formed on active areas of the...
US-1,001,4307 Semiconductor device manufacturing method including implementing elements of memory unit and logic unit
A method for manufacturing a semiconductor device includes providing a substrate, a first conductor, a second conductor, a first dielectric, a second...
US-1,001,4306 Memory structure and manufacturing method for the same
A memory structure and a manufacturing method for the same are disclosed. The memory structure comprises memory segments. Each of the memory segments comprises...
US-1,001,4305 Methods of forming an array comprising pairs of vertically opposed capacitors and arrays comprising pairs of...
A method of forming an array comprising pairs of vertically opposed capacitors comprises forming a conductive lining in individual capacitor openings in...
US-1,001,4304 Integrated circuit device and method of manufacturing the same
A method includes providing a plurality of active regions on a substrate, and at least a first device isolation layer between two of the plurality of active...
US-1,001,4303 Devices with contact-to-gate shorting through conductive paths between fins and fabrication methods
Semiconductor devices and methods of fabricating the semiconductor devices for forming conductive paths between fins for contact-to-gate shorting. One method...
US-1,001,4302 Methods of forming memory arrays
Some embodiments include a method of forming a memory array. A wordline is formed to extend along a first direction, and along a rail of semiconductor material....
US-1,001,4301 Semiconductor constructions
Some embodiments include methods in which a pair of spaced-apart adjacent features is formed over a substrate. The features have silicon dioxide surfaces....
US-1,001,4300 Integrated circuit devices having inter-device isolation regions and methods of manufacturing the same
An integrated circuit device as provided herein may include a device region and an inter-device isolation region. Within the device region, a fin-type active...
US-1,001,4299 Field effect transistor device spacers
A method for fabricating a field effect transistor device comprises forming a fin on a substrate, forming a first dummy gate stack and a second dummy gate stack...
US-1,001,4298 Method of forming field effect transistors with replacement metal gates and contacts and resulting structure
In a method for forming an integrated circuit (IC) structure, which incorporates multiple field effect transistors (FETs) with discrete replacement metal gates...
US-1,001,4297 Methods of forming integrated circuit structure using extreme ultraviolet photolithography technique and...
One aspect of the disclosure is directed to a method of forming an integrated circuit structure. The method may include: providing a set of fins over a...
US-1,001,4296 Fin-type field effect transistors with single-diffusion breaks and method
Disclosed is a method of forming a semiconductor structure that includes one or more fin-type field effect transistors (FINFETs) and single-diffusion break...
US-1,001,4295 Self heating reduction for analog radio frequency (RF) device
A method of forming a semiconductor device includes forming a plurality of semiconductor fins from an upper semiconductor layer located on a first region of a...
US-1,001,4294 Semiconductor integrated circuit device having enhancement type NMOS and depression type MOS with N-type...
Provided is a constant voltage circuit having a stable output voltage. In a constant voltage circuit formed by connecting an enhancement type NMOS and a...
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