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Patent # Description
US-1,002,0394 Extended drain metal-oxide-semiconductor transistor
Devices and methods for forming a device are disclosed. A substrate is provided. A first body well of a second polarity type is formed in the substrate. A...
US-1,002,0393 Laterally diffused metal-oxide-semiconductor transistor and manufacturing method thereof
The present invention provides a laterally diffused metal-oxide-semiconductor (LDMOS) transistor and a manufacturing method thereof. The LDMOS transistor...
US-1,002,0392 Diode, junction field effect transistor, and semiconductor device
Provided are a diode, a junction field effect transistor (JFET), and a semiconductor device that have a top doped region. A dopant concentration gradient of the...
US-1,002,0391 Semiconductor device and manufacturing method of the same
According to one embodiment, a semiconductor device includes a semiconductor layer; a plurality of semiconductor regions; second semiconductor region; a first...
US-1,002,0390 Semiconductor device and semiconductor device manufacturing method
A technique achieving a higher voltage resistance by a depletion layer extending quickly within a circumferential region is provided. A semiconductor device...
US-1,002,0389 Normally off gallium nitride field effect transistors (FET)
A heterostructure field effect transistor (HFET) gallium nitride (GaN) semiconductor power device comprises a hetero-junction structure comprises a first...
US-1,002,0388 Insulated gate bipolar transistor including charge injection regions
A semiconductor device is disclosed. One embodiment provides a cell area and a junction termination area at a first side of a semiconductor zone of a first...
US-1,002,0387 Method for manufacturing a bipolar junction transistor
Embodiments provide a method for manufacturing a bipolar junction transistor, comprising: providing a semiconductor substrate comprising a buried layer of a...
US-1,002,0386 High-voltage and analog bipolar devices
The present disclosure relates to semiconductor structures and, more particularly, to high-voltage, analog bipolar devices and methods of manufacture. The...
US-1,002,0385 Memory cell and manufacturing method thereof
The present invention provides a memory cell, which includes a substrate, a gate dielectric layer, a patterned material layer, a selection gate and a control...
US-1,002,0384 Forming a fin using double trench epitaxy
The present invention relates generally to semiconductor devices and more particularly, to a structure and method of forming a fin using double trench epitaxy....
US-1,002,0383 Preserving the seed layer on STI edge and improving the epitaxial growth
A method of forming self-aligned STI regions extending over portions of a Si substrate to enable the subsequent formation of epitaxially grown embedded S/D...
US-1,002,0382 Method of manufacturing low temperature poly-silicon array substrate, array substrate, and display panel
The present disclosure proposes a method of manufacturing a low temperature poly-silicon array substrate, an array substrate and a display panel. The method...
US-1,002,0381 Embedded bottom metal contact formed by a self-aligned contact process for vertical transistors
Embodiments are directed to a method and resulting structures for a vertical field effect transistor (VFET) having an embedded bottom metal contact. A...
US-1,002,0380 Power device with high aspect ratio trench contacts and submicron pitches between trenches
This invention discloses a semiconductor power device disposed in a semiconductor substrate including an active cell areas and a termination area. The...
US-1,002,0379 Method for forming semiconductor device structure using double patterning
A method for forming a semiconductor device structure is provided. The method includes forming a mandrel masking structure over a target layer. The method also...
US-1,002,0377 Electronic devices
A method of manufacturing an electronic device comprising a first terminal (e.g. a source terminal), a second terminal (e.g. a drain terminal), a semiconductor...
US-1,002,0376 Sidewall passivation for HEMT devices
Some embodiments of the present disclosure relate to a high electron mobility transistor (HEMT) which includes a heterojunction structure arranged over a...
US-1,002,0375 Tungsten gates for non-planar transistors
The present description relates to the field of fabricating microelectronic devices having non-planar transistors. Embodiments of the present description relate...
US-1,002,0374 Field-effect transistor, semiconductor memory display element, image display device, and system
A field-effect transistor includes a substrate; a source electrode, a drain electrode, and a gate electrode that are formed on the substrate; a semiconductor...
US-1,002,0373 Semiconductor device
Provided is a highly reliable semiconductor device that uses a thick passivation layer. The protective film is formed so as to cover mostly the entire surface...
US-1,002,0372 Method to form thicker erase gate poly superflash NVM
A method of forming a thick EG polysilicon over the FG and resulting device are provided. Embodiments include forming a CG on a substrate; forming an STI...
US-1,002,0371 Contact techniques and configurations for reducing parasitic resistance in nanowire transistors
Embodiments of the present disclosure provide contact techniques and configurations for reducing parasitic resistance in nanowire transistors. In one...
US-1,002,0370 Ring-type field effect transistor for terahertz wave detection, which uses gate metal as antenna
A ring-type FET may include a silicon base, a source formed on a portion of the silicon base through doping, a channel formed to encompass the source on a...
US-1,002,0369 Dual channel trench LDMOS transistors with drain superjunction structure integrated therewith
A dual channel trench LDMOS transistor includes a semiconductor layer of a first conductivity type formed on a substrate; a first trench formed in the...
US-1,002,0368 Silicon carbide semiconductor element and manufacturing method thereof
A silicon carbide (SiC) semiconductor element includes a semiconductor layer, a dielectric layer on a surface of the semiconductor layer, a gate electrode layer...
US-1,002,0367 Silicon carbide semiconductor device
An object of the present invention is to provide a silicon carbide semiconductor device with which the electric field at the time of switching is relaxed and...
US-1,002,0366 Removal of basal plane dislocations from silicon carbide substrate surface by high temperature annealing and...
A method and device including adding a protective layer on the surface of a substrate, annealing the substrate at a temperature approximately greater or equal...
US-1,002,0365 Graphene device and method of fabricating a graphene device
In accordance with an example embodiment of the present invention, a device comprising one or more porous graphene layers, the or each graphene porous layer...
US-1,002,0364 Nonvolatile semiconductor memory device and method of manufacturing the same
One embodiment includes: forming a laminated body by alternately laminating a conducting layer and an interlayer insulating layer on a substrate; forming a...
US-1,002,0363 Bulb-shaped memory stack structures for direct source contact in three-dimensional memory device
Sacrificial semiconductor material portions are connected by a sacrificial semiconductor line extending along a different horizontal direction and protruding...
US-1,002,0362 Semiconductor device and method of manufacturing the same
A semiconductor device includes a first semiconductor region of a first conductivity type, a second semiconductor region of the first conductivity type, a third...
US-1,002,0361 Circuit structure having islands between source and drain and circuit formed
A method of making a circuit structure includes growing a bulk layer over a substrate, and growing a donor-supply layer over the bulk layer. The method further...
US-1,002,0360 Integrated memory
Some embodiments include an integrated memory having an array of capacitors. The array has edges. The capacitors along the edges are edge capacitors, and the...
US-1,002,0359 Leakage current reduction in stacked metal-insulator-metal capacitors
Capacitors and methods of forming the same include forming a dielectric layer on a first metal layer. The dielectric layer is oxygenated such that interstitial...
US-1,002,0358 Metal resistors having nitridized dielectric surface layers and nitridized metal surface layers
A semiconductor structure containing at least two metal resistor structures having different resistivities is provided and includes a first metal resistor...
US-1,002,0357 Sense resistor surroundingly positioned near or around and integrated with an output connection
An integrated sense resistor within an integrated circuit (IC) may be surroundingly positioned near and coupled to a connection such as a pin or ball. The...
US-1,002,0356 Organic light-emitting diode display device
Provided is an organic light-emitting display device. An organic light-emitting display device (OLED) includes: a substrate including at least three pixel...
US-1,002,0355 Photosensor and display device having the same
A photosensor includes a first light-shielding layer provided on an insulating surface; a first insulating layer covering the first light-shielding layer; a...
US-1,002,0354 Organic light-emitting diode displays with silicon and semiconducting oxide thin-film transistors
An electronic device may include a display having an array of display pixels on a substrate. The display pixels may be organic light-emitting diode display...
US-1,002,0353 Organic electroluminescent display device
An organic electroluminescent display device includes a display area including a plurality of pixels, a peripheral area as an area on the outside of the display...
US-1,002,0352 Substrate structure
A substrate structure may be used in a display device. The substrate structure may include a base substrate, a transistor, and a silicon oxynitride layer. The...
US-1,002,0351 Electroluminescence display device
Embodiments disclosed herein relate to an electroluminescence display device including a first electrode, a second electrode facing the first electrode, an...
US-1,002,0350 Display panel and information processing device
A novel display panel that can be used as a reflective display panel in an environment with strong external light and as a self-luminous display panel in a dim...
US-1,002,0349 Organic light emitting device
Provided is an organic light emitting device. The organic light emitting device includes a plurality of light emitting units laminated between a first electrode...
US-1,002,0348 Organic light emitting display device with multiple emission layers
An organic light emitting display device includes a first emission part between an anode and a cathode and a second emission part on the first emission part. At...
US-1,002,0347 Solid-state image pickup device and electronic apparatus
Image sensors, electronic apparatuses, and methods of manufacturing an image sensor are provided. More particularly, an image sensor having a plurality of...
US-1,002,0346 Resistive memory device by substrate reduction
To provide enhanced data storage devices and systems, various systems, architectures, apparatuses, and methods, are provided herein. In a first example, a...
US-1,002,0345 Method for manufacturing image capturing device and image capturing device
An offset spacer film (OSS) is formed on a side wall surface of a gate electrode (NLGE, PLGE) to cover a region in which a photo diode (PD) is disposed. Next,...
US-1,002,0344 CIS chips and methods for forming the same
A device includes a semiconductor substrate, an image sensor at a front surface of the semiconductor substrate, and a plurality of dielectric layers over the...
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