Easy To Use Patents Search & Patent Lawyer Directory

At Patents you can conduct a Patent Search, File a Patent Application, find a Patent Attorney, or search available technology through our Patent Exchange. Patents are available using simple keyword or date criteria. If you are looking to hire a patent attorney, you've come to the right place. Protect your idea and hire a patent lawyer.

Searching:





Search by keyword, patent number, inventor, assignee, city or state:




Patent # Description
US-1,001,9393 Interruption facility for adjunct processor queues
Interruption facility for adjunct processor queues. In response to a queue transitioning from a no replies pending state to a reply pending state, an...
US-1,001,9392 Preventing software thread blocking due to interrupts
According to one exemplary embodiment, a method for preventing a software thread from being blocked due to processing an external device interrupt is provided....
US-1,001,9391 Preventing software thread blocking due to interrupts
According to one exemplary embodiment, a method for preventing a software thread from being blocked due to processing an external device interrupt is provided....
US-1,001,9390 Using memory cache for a race free interrupt scheme without the use of "read clear" registers
A computer device includes a processor, a circuit block capable of issuing an interrupt to the processor, and a cacheable memory configured to include a...
US-1,001,9389 Memory controller and memory access method
A memory controller (10) for a plurality of banks of memory (55a-55c) is disclosed. The memory controller (10) includes an interface (20) connectable to a bus...
US-1,001,9388 Enhanced initialization for data storage assemblies
Systems, methods, apparatuses, and software for data storage systems are provided herein. In one example, a data storage platform includes data storage...
US-1,001,9387 Reference voltage calibration using a qualified weighted average
An apparatus and method for encoding data are disclosed that may allow for performing periodic calibration operations on a communication link. A controller may...
US-1,001,9386 Interface detection circuit
One or more characteristics of devices are ascertained in accordance with one or more aspects of the disclosure. As may be consistent with one or more...
US-1,001,9385 Method and apparatus of real-time retimer delay measurement
Described is an apparatus comprising a first circuitry, a second circuitry, a third circuitry, and a fourth circuitry. The first circuitry may be an elastic...
US-1,001,9384 Memory tamper detection
A method and system for detecting tampering of authenticated memory blocks that are accessible by an untrusted host processor, by (1) periodically...
US-1,001,9383 Rotatable-key encrypted volumes in a multi-tier disk partition system
Disclosed technology includes access to rotatable-key-encrypted content in a multi-tier disk partition system, with a first-tier-track, and initializing a...
US-1,001,9382 Secondary data structures for storage class memory (scm) enables main-memory databases
Disclosed herein are system, method, and computer program product embodiments for accessing and managing storage class memory (SCM) enabled main-memory database...
US-1,001,9381 Cache control to reduce transaction roll back
In one embodiment, a microprocessor is provided. The microprocessor includes a cache that is controlled by a cache controller. The cache controller is...
US-1,001,9380 Providing memory management functionality using aggregated memory management units (MMUs)
Providing memory management functionality using aggregated memory management units (MMUs), and related apparatuses and methods are disclosed. In one aspect, an...
US-1,001,9379 Translation lookaside buffer switch bank
Example devices are disclosed. For example, a device may include a processor, a plurality of translation lookaside buffers, a plurality of switches, and a...
US-1,001,9378 Addressing recent strings with ring buffer
A non-transitory computer-readable storage medium may include instructions stored thereon. When executed by at least one processor, the instructions may be...
US-1,001,9377 Managing cache coherence using information in a page table
The described embodiments include a computing device with two or more types of processors and a memory that is shared between the two or more types of...
US-1,001,9376 Memory system and operating method thereof
A memory system includes a memory device including first and second storage regions, each comprising a plurality of memory blocks and a controller suitable for...
US-1,001,9375 Cache device and semiconductor device including a tag memory storing absence, compression and write state...
A cache device has a data memory capable of storing a piece of first cache line data and a piece of second cache line data for first and second ways in...
US-1,001,9374 Implementing barriers to efficiently support cumulativity in a weakly-ordered memory system
A technique for operating a lower level cache memory of a data processing system includes receiving an operation that is associated with a first thread. Logical...
US-1,001,9373 Memory management method for supporting shared virtual memories with hybrid page table utilization and related...
A memory management method includes: checking shared virtual memory (SVM) support ability of at least one device participating in data access of a buffer;...
US-1,001,9372 Caching sensing device data in data storage device
Data is received from a sensing device for storage in at least one memory of a Data Storage Device. It is determined whether to cache the received data in at...
US-1,001,9371 Data caching using local and remote memory
A system and method for retrieving cached data are disclosed herein. The system includes a cache server including a local memory and a table residing on the...
US-1,001,9370 Probabilistic associative cache
A computer cache memory organization called Probabilistic Set Associative Cache (PAC) has the hardware complexity and latency of a direct-mapped cache but...
US-1,001,9369 Apparatuses and methods for pre-fetching and write-back for a segmented cache memory
Apparatuses and methods for a cache memory are described. In an example method, a transaction history associated with a cache block is referenced, and requested...
US-1,001,9368 Placement policy for memory hierarchies
A placement policy enables the selective storage of cachelines in a multi-level cache hierarchy: Reuse behavior of a cacheline is tracked during execution of an...
US-1,001,9367 Memory module, computing system having the same, and method for testing tag error thereof
A method includes outputting, at a processor, a command and an address to the memory module, receiving match/unmatch bits indicating results of comparing a tag...
US-1,001,9366 Satisfying memory ordering requirements between partial reads and non-snoop accesses
A method and apparatus for preserving memory ordering in a cache coherent link based interconnect in light of partial and non-coherent memory accesses is herein...
US-1,001,9365 Adaptive value range profiling for enhanced system performance
Enhanced adaptive profiling of ranges of values in a stream of events includes identifying a set of contiguous ranges of the values and corresponding access...
US-1,001,9364 Access-based eviction of blocks from solid state drive cache memory
Methods and systems are presented for allocating CPU cycles among processes in a storage system. One method includes operations for maintaining segments in a...
US-1,001,9363 Persistent memory versioning and merging
Example implementations may relate to a version controller allocating a copy page in persistent memory upon receiving, from an application executing on a...
US-1,001,9362 Systems, devices and methods using solid state devices as a caching medium with adaptive striping and mirroring...
An example method for using a plurality of SSDs as a caching medium in a data storage system can include splitting the SSDs into a plurality of cache regions,...
US-1,001,9361 Low-layer memory for a computing platform
The present disclosure relates to low-layer memory for a computing platform. An example embodiment includes a memory hierarchy being directly connectable to a...
US-1,001,9360 Hardware predictor using a cache line demotion instruction to reduce performance inversion in core-to-core data...
Apparatus and methods implementing a hardware predictor for reducing performance inversions caused by intra-core data transfer during inter-core data transfer...
US-1,001,9359 Optimized read processing
Described are techniques for processing I/O operations. A read operation is received to read first data from a first location. It is determined whether the read...
US-1,001,9358 Bank address remapping to load balance memory traffic among banks of memory
A system includes a processing component and a memory controller. The memory controller is to conduct memory accesses to a banked memory responsive to memory...
US-1,001,9357 Supporting atomic accumulation with an addressable accumulator
Atomically accumulating memory updates in a computer system configured with an accumulator that is memory mapped. The accumulator includes an accumulator memory...
US-1,001,9356 Reconstruct drive for dynamic resizing
A solid-state drive (SSD) is configured for dynamic resizing. When the SSD approaches the end of its useful life because the over-provisioning amount is nearing...
US-1,001,9355 Flash memory apparatus and storage management method for flash memory
A flash memory storage management method includes: providing a flash memory module including single-level-cell (SLC) blocks and at least one multiple-level-cell...
US-1,001,9354 Apparatus and method for fast cache flushing including determining whether data is to be stored in nonvolatile...
Apparatus, systems, and methods to manage memory operations are described. A cache controller is provided comprising logic to receive a transaction to operate...
US-1,001,9353 Systems and methods for referencing data on a storage medium
A storage layer is configured to store data at respective offsets within storage units of a storage device. Physical addresses of the data may be segmented into...
US-1,001,9352 Systems and methods for adaptive reserve storage
A storage layer may over-provision physical storage resources of a storage medium by reserving a portion of the full physical storage capacity of the storage...
US-1,001,9351 Booting an application from multiple memories
Disclosed herein are system, apparatus, article of manufacture, method and/or computer program product embodiments for booting an application from multiple...
US-1,001,9350 Dram and method for accessing a dram
The present disclosure provides a method. The method includes copying a data stored in memory cells associated with a normal word line subject to a row hammer...
US-1,001,9349 Cache memory and method of managing the same
A cache memory and a method of managing the same are provided. The method of managing a cache memory includes determining whether a number of bits of a data...
US-1,001,9348 Semiconductor device including circuit configured to be in resting state
A novel semiconductor device or a semiconductor device whose power consumption can be reduced is provided. The semiconductor device includes a sensor portion, a...
US-1,001,9347 Systems and methods for selection of test cases for payment terminals
The present disclosure proposes a computer implemented method for selecting test cases to be executed on a terminal by creating a configuration code and...
US-1,001,9346 Generating software test script from video
Methods and apparatus are disclosed to generate software test script from video. Example methods disclosed herein include determining a user action in a frame...
US-1,001,9345 Executing multi-version tests against a multi-version application
Particular embodiments provide a test system that allows the testing of different versions. The test system uses a repository of features that are included in...
US-1,001,9344 Computer implemented system and method and computer program product for a test framework for orchestration...
A system, method and computer program product for a test framework for orchestration workflows. For example, a method in accordance with some embodiments...
← Previous | 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 | Next →

File A Patent Application

  • Protect your idea -- Don't let someone else file first. Learn more.

  • 3 Easy Steps -- Complete Form, application Review, and File. See our process.

  • Attorney Review -- Have your application reviewed by a Patent Attorney. See what's included.