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Patent # Description
US-1,006,1754 Method and apparatus for declarative updating of self-describing, structured documents
The present invention includes a method and device for updating a self-describing, structured document. A further aspect of the present invention is enabling...
US-1,006,1753 Systems and methods for content extraction from a mark-up language text accessible at an internet domain
Systems and methods are presented for content extraction from markup language text. The content extraction process may parse markup language text into a...
US-1,006,1752 Method and apparatus for generating a font of which style is changeable
A method and apparatus for generating a font of which style is changeable are disclosed. The disclosed method is a method for generating a font to be performed...
US-1,006,1751 Promoting content
Methods, systems, and apparatus, including computer programs encoded on a computer-readable storage medium, and including a computer-implemented method for...
US-1,006,1750 Arranging elements in a layout
Arranging elements in a layout includes obtaining multiple elements to be arranged in a layout where the layout has at least one container to display multiple...
US-1,006,1749 Systems and methods for contextual vocabularies and customer segmentation
Contextual vocabulary and methods of use are provided herein. A method may include obtaining contextual properties for a plurality of end users and device...
US-1,006,1748 Adaptive tile matrix representation and multiplication
According to some embodiments, matrix A data may be loaded into a temporary, unordered starting representation that contains coordinates and values for each...
US-1,006,1747 Storage of a matrix on a storage compute device
A compressed format is selected for storage of a matrix based on a computation to be performed using the matrix and architecture of a storage compute device to...
US-1,006,1746 Instruction and logic for a vector format for processing computations
A processor includes a front end to fetch an instruction. The instruction is to calculate a data point using inputs from a plurality of adjacent source data in...
US-1,006,1745 Method and apparatus for matching vehicle ECU programming to current vehicle operating conditions
Disclosed herein are techniques for implementing vehicle ECU reprograming, so the ECU programming, which plays a large role in vehicle performance...
US-1,006,1744 Using RDMA for fast system recovery in virtualized environments
A method, system and computer program product are disclosed for recovery in a virtualized environment using remote direct memory access (RDMA). In one...
US-1,006,1743 Host based non-volatile memory clustering using network mapped storage
In one embodiment, a system includes non-volatile memory (NVM) configured to store data, a memory controller connected to the NVM via a NVM interface, a network...
US-1,006,1742 Advertising in a digital media playback system
Techniques pertaining to advertising through a digital data network are disclosed. Advertisement information is embedded in multimedia data stream as structured...
US-1,006,1741 Graph display apparatus, graph display method and program recording medium
A graph display apparatus includes a display unit and a processor. The display unit includes a display screen. The processor performs following processes of:...
US-1,006,1740 Receiver with signal arrival detection capability
A receiver includes first, second, and third signal processors and a controller. The first signal processor provides a first signal in response to detecting a...
US-1,006,1739 Portable instrument and docking station with divided universal serial bus communication device
A universal serial bus (USB) communication system includes a portable instrument and a docking station that communicate with a host device using a divided USB...
US-1,006,1738 Ephemeral peripheral device
An ephemeral system includes an ephemeral communications device and associated ephemeral memory system (onboard or peripheral) for securing user data. Different...
US-1,006,1737 Signal processing device, method of signal processing, storage medium, and electronic musical instrument
A double buffer (four pages.times.2 system) constituted by a DSP program buffer (D-RAM) and a prefetch program buffer (D-RAM) is provided, and burst access is...
US-1,006,1736 Drive message router
Embodiments described are generally directed to a mass storage unit possessing a plurality of non-volatile data storage devices each possessing non-transitory...
US-1,006,1735 USB chipset
A USB chipset coupled between a first device and a second device is provided. A data processing unit is coupled to the first device and generates a plurality of...
US-1,006,1734 Adjustment of buffer credits and other parameters in a startup phase of communications between a plurality of...
A control unit provides a number of buffer credits, to one or more channels, in response to an initiation of a startup phase of communication between the one or...
US-1,006,1733 Peripheral interface chip and data transmission method thereof
A peripheral interface chip and a data transmission method thereof are provided. The peripheral interface chip includes a switching circuit, a universal serial...
US-1,006,1732 Enabling arrangement for an electronic device with housing-integrated functionalities and method therefor
An electronic device includes a housing, or a `cover`, the housing material molded into a desired target shape and to at least partially embed a plurality of...
US-1,006,1731 Selectable peripheral logic in programmable apparatus
A programmable apparatus for executing a function is disclosed. The programmable apparatus includes a physical interface configured to be connected with an...
US-1,006,1730 Routing of messages
A method to provide transfer of data without the use of a network from an application program to an embedded device. A routing service establishes a...
US-1,006,1729 Scalable multi-core system-on-chip architecture on multiple dice for high end microcontroller
A system for a multiple chip architecture that enables different system on-chip (SoC) systems with varying compatibilities to interact as one SoC via a...
US-1,006,1728 Arbitration and hazard detection for a data processing apparatus
A device for selecting requests to be serviced in a data processing apparatus has an arbitration stage for selecting an arbitrated request from a plurality of...
US-1,006,1727 Enhanced queue management
A paired queue apparatus and method comprising request and response queues wherein queue head and tail pointer update values are communicated through an...
US-1,006,1726 Precision time management (PTM) for USB retimers that accurately adjusts timestamp fields of isochronous...
A system and method of conducting precision time management in a universal serial bus system with a retimer. The method includes initiating, from the retimer, a...
US-1,006,1725 Scanning memory for de-duplication using RDMA
A method for storage includes storing multiple memory pages in a memory of a first compute node. Using a second compute node that communicates with the first...
US-1,006,1724 Latency reduction for direct memory access operations involving address translation
Latency reduction for direct memory access operations involving address translation is disclosed. Example methods disclosed herein to perform direct memory...
US-1,006,1723 Techniques for handling queued interrupts in a data processing system based on a saturation value
A technique for handling queued interrupts includes accumulating, by an interrupt routing controller (IRC), respective backlog counts for respective event...
US-1,006,1722 Method to handle concurrent fatal events in a multicore execution environment
Techniques for handling concurrent fatal events in a multicore execution environment are described. An example method for handling interrupts in a processor...
US-1,006,1721 System of data handling based on periodic interruptions to electricity supply
An approach to data handling based upon the temporal extents of the interruptions to supply of electricity to selected components is provided. At present,...
US-1,006,1720 Storage system and signal transfer method
A storage system includes a controller part, a data storage part, and a transfer path of a signal that couples these parts. A driver included in the controller...
US-1,006,1719 Packed write completions
A plurality of completed writes to memory are identified corresponding to a plurality of write requests from a host device received over a buffered memory...
US-1,006,1718 Protecting secret state from memory attacks
Described is a technology by which classes of memory attacks are prevented, including cold boot attacks, DMA attacks, and bus monitoring attacks. In general,...
US-1,006,1717 Storing multiple encryption keys to protect data at rest
Techniques of protecting data involve storing a data structure in a data storage system that associates indices with respective keys. In this data structure,...
US-1,006,1716 Storage device authentication
Systems and methods authenticate storage devices. In one implementation, a computer-implemented method is provided for authenticating a storage device....
US-1,006,1715 Structure-preserving subgraph queries
The present invention relates to solving the issues related to subgraph query services with tunable preservation of privacy of structural information. More...
US-1,006,1714 Tuple encoding aware direct memory access engine for scratchpad enabled multicore processors
Techniques are described herein for efficient movement of data from a source memory to a destination memory. In an embodiment, in response to a particular...
US-1,006,1713 Associating cache memory with a work process
Systems, methods, and software described herein provide accelerated input and output of data in a work process. In one example, a method of operating a support...
US-1,006,1712 Virtual memory page mapping overlays
In some embodiments, a memory overlay system comprises a translation lookaside buffer (TLB) that includes an entry that specifies a virtual address range that...
US-1,006,1711 File access method and apparatus, and storage system
A file access method and apparatus, and a storage system are provided. After receiving a file access request from a process, a first physical address space is...
US-1,006,1710 Storage device
The present invention provides a storage device adopting a semiconductor device as a storage media having a nonvolatile property and must be erased for writing...
US-1,006,1709 Systems and methods for accessing memory
Methods of mapping memory cells to applications, methods of accessing memory cells, systems, and memory controllers are described. In some embodiments, a memory...
US-1,006,1708 Mapped region table
Techniques and systems for first determining if a non-volatile memory configured to store physical data pages is being initialized, and a volatile memory...
US-1,006,1707 Speculative enumeration of bus-device-function address space
A first device is determined as connected to a first one of a plurality of ports of a root complex. Addresses are assigned corresponding to a first hierarchy of...
US-1,006,1706 System and method for eviction and replacement in large content-addressable flash caches
In a processing system in which at least one entity issues data read and write requests to at least one storage system that stores data as data units,...
US-1,006,1705 Identifying instructions for decode-time instruction optimization grouping in view of cache boundaries
A technique for processing instructions includes examining instructions in an instruction stream of a processor to determine properties of the instructions. The...
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