Easy To Use Patents Search & Patent Lawyer Directory

At Patents you can conduct a Patent Search, File a Patent Application, find a Patent Attorney, or search available technology through our Patent Exchange. Patents are available using simple keyword or date criteria. If you are looking to hire a patent attorney, you've come to the right place. Protect your idea and hire a patent lawyer.

Searching:





Search by keyword, patent number, inventor, assignee, city or state:




Patent # Description
US-1,010,3198 Magnetoresistive element and magnetic memory
A magnetoresistive element according to an embodiment includes: a multilayer structure including a first magnetic layer, a second magnetic layer disposed above...
US-1,010,3197 Magnetoresistive device design and process integration with surrounding circuitry
Magnetoresistive device architectures and methods for manufacturing are presented that facilitate integration of process steps associated with forming such...
US-1,010,3196 Methods of forming magnetic memory cells, and methods of forming arrays of magnetic memory cells
Methods of forming a magnetic memory cell are disclosed. The method comprises forming a magnetic cell core material over a substrate, wherein forming the...
US-1,010,3195 Semiconducting pixel, matrix of such pixels, semiconducting structure for the production of such pixels and...
A pixel comprises three adjacent sub-pixels, formed by respective stacks of semi-conducting layers wherein: each sub-pixel comprises a first active layer,...
US-1,010,3194 Self-aligned optical grid on image sensor
An image sensor includes a substrate, a plurality of light sensitive pixels, a first plurality of color filters, a plurality of reflective sidewalls, and a...
US-1,010,3193 Apparatus and method for low dark current floating diffusion
An apparatus and method for a low dark current floating diffusion is discussed. An example method includes coupling a photodiode to a floating diffusion through...
US-1,010,3192 Photoelectric conversion element, image reading device, and image forming apparatus
A photoelectric conversion element includes a plurality of light-receiving elements, a plurality of pixel circuits, and a plurality of storage units. The...
US-1,010,3191 Semiconductor die and method of packaging multi-die with image sensor
A semiconductor wafer has an image sensor area with a light transmissive wafer, such as glass, disposed over the semiconductor wafer. A portion of the...
US-1,010,3190 Imaging sensor having floating region of imaging device on one substrate electrically coupled to another...
An image sensor may include a symmetrical imaging pixel with a floating diffusion region. The floating diffusion region may be formed in the center of the...
US-1,010,3189 Solid-state image sensor, and imaging system
A solid-state image sensor and an imaging system with a two-dimensional pixel array, and a plurality of types of filters that are arranged facing a pixel region...
US-1,010,3188 Method of manufacturing semiconductor device and semiconductor device
A performance of a semiconductor device is improved. A method of manufacturing a semiconductor device according to one embodiment includes a step of mounting a...
US-1,010,3187 Image sensor color correction
An image sensor includes a plurality of photodiodes disposed in a semiconductor material and a plurality of transfer transistors. Individual transfer...
US-1,010,3186 Photoelectric conversion apparatus, image pickup system, and method for manufacturing photoelectric conversion...
A photoelectric conversion section contains a semiconductor element having a laminated structure which contains an electroconductor, a semiconductor, and an...
US-1,010,3185 Graded-semiconductor image sensor
A method of image sensor fabrication includes growing a semiconductor material having an illuminated surface and a non-illuminated surface, where the...
US-1,010,3184 Latch circuit, double data rate ring counter based on the latch circuit, hybrid counting device, analog-digital...
Disclosed are a latch circuit receiving a negative output of a next stage latch circuit as a feedback input, a double data rate (DDR) ring counter based on the...
US-1,010,3183 Manufacturing method of imaging device and imaging system
A manufacturing method of an imaging device includes ion-implanting impurity ions of a second conductivity type into a first region and a second region using a...
US-1,010,3182 Photoelectric conversion apparatus and image reading apparatus
A photoelectric conversion apparatus includes a semiconductor substrate having one principle surface including recessed portions, and insulation bodies in the...
US-1,010,3181 Solid-state imaging device
A solid-state imaging device includes: pixels arranged in a matrix; a vertical signal line provided for each column, conveying a pixel signal; a power line...
US-1,010,3180 Crystallization apparatus, crystallizing method, and method of manufacturing organic light-emitting display...
A crystallization apparatus for crystallizing a semiconductor layer formed on a substrate. The crystallization apparatus includes a laser generator, which...
US-1,010,3179 Flexible display device with flexible substrate having bend portion
There is provided a flexible display having a plurality of innovations configured to allow bending of a portion or portions to reduce apparent border size...
US-1,010,3178 Display device
A display device according to one embodiment, includes a thin-film transistor. The thin-film transistor includes a semiconductor layer including a channel...
US-1,010,3177 Thin film transistor array panel and manufacturing method of the same
A thin film transistor array panel includes a substrate, a data line and a light blocking layer disposed on the substrate, a thin film transistor disposed on...
US-1,010,3175 Fin-shaped structure
A method of forming a fin-shaped structure includes the following steps. A substrate having at least a fin structure thereon is provided. A liner is formed on...
US-1,010,3174 Semiconductor-on-insulator (SOI) device and related methods for making same using non-oxidizing thermal treatment
A method for making a semiconductor device may include forming, on a first semiconductor layer of a semiconductor-on-insulator (SOI) wafer, a second...
US-1,010,3173 Manufacture method of array substrate and array substrate manufactured by the method
The present invention provides a manufacture method of an array substrate and an array substrate manufactured by the method. By employing one mask to achieve...
US-1,010,3172 Method for high performance standard cell design techniques in finFET based library using local layout effects...
Inventive concepts describe a method for high performance standard cell design techniques in FinFET based library using LLE. Inventive concepts describe a...
US-1,010,3171 Metal on elongated contacts
An integrated circuit containing elongated contacts, including elongated contacts which connect to at least three active areas and/or MOS gates, and including...
US-1,010,3170 Semiconductor device having a vertical pillar connected to the substrate
A semiconductor device includes word lines vertically stacked on top of each other on a substrate, insulating patterns between the word lines, a vertical pillar...
US-1,010,3169 Method of making a three-dimensional memory device using a multi-step hot phosphoric acid wet etch process
At least one alternating stack of insulating layers and silicon nitride layers is formed over a substrate. Memory stack structures are formed through the at...
US-1,010,3168 Stacked type semiconductor memory device
According to one embodiment, a semiconductor memory device includes a stacked body which is provided on a substrate and in which an insulating film and an...
US-1,010,3167 Manufacturing method of semiconductor structure
A manufacturing method of a semiconductor structure is provided. The manufacturing method of the semiconductor structure includes the following steps: forming a...
US-1,010,3166 Semiconductor device and critical dimension defining method thereof
A semiconductor device includes a semiconductor substrate, a circuit unit and an align mark. The circuit unit is disposed on the semiconductor substrate. The...
US-1,010,3165 Memory device
A memory device includes a gate structure including a plurality of gate electrode layers stacked on an upper surface of a substrate, a plurality of vertical...
US-1,010,3164 Three-dimensional semiconductor device
A 3D semiconductor device is provided, including several memory layers vertically stacked on a substrate, an upper selection layer formed on the memory layers,...
US-1,010,3163 Semiconductor memory device
A semiconductor memory device is disclosed. The device may include a stack including gate electrodes stacked on a substrate in a vertical direction and...
US-1,010,3162 Vertical neuromorphic devices stacked structure and array of the structure
Provided is a vertical neuromorphic devices stacked structure comprising a main gate which is formed on a substrate and has a vertical pillar shape, a main gate...
US-1,010,3161 Offset backside contact via structures for a three-dimensional memory device
Die cracking of a three dimensional memory device may be reduced by adding offsets to backside contact via structures. Each backside contact via structure can...
US-1,010,3160 Semiconductor structures including dielectric materials having differing removal rates
Semiconductor structures may include a stack of alternating dielectric materials and control gates, charge storage structures laterally adjacent to the control...
US-1,010,3159 Vertical three-dimensional semiconductor device and method of making same
The disclosed technology generally relates to semiconductor devices, and more particularly to a vertical three-dimensional semiconductor device and a method for...
US-1,010,3158 Memory system and method for controlling nonvolatile memory
According to one embodiment, a memory system classifies a plurality of nonvolatile memory dies connected to a plurality of channels, into a plurality of die...
US-1,010,3157 Nonvolatile memory having a shallow junction diffusion region
A nonvolatile memory cell includes a semiconductor substrate, a first OD region, a second OD region for forming an erase gate region, and a trench isolation...
US-1,010,3156 Strap layout for non-volatile memory device
A device and methods for forming the device are disclosed. The method includes providing a substrate prepared with a memory cell region and forming memory cell...
US-1,010,3155 Semiconductor memory device
A semiconductor memory device according to an embodiment, includes a first semiconductor member, a second semiconductor member, an insulating member, a...
US-1,010,3154 Method for producing an SGT-including semiconductor device
A method for producing an SGT-including semiconductor device includes forming a gate insulating layer on an outer periphery of a Si pillar, forming a gate...
US-1,010,3153 SRAM layout for double patterning
An integrated circuit with a SAR SRAM cell with power routed in metal-1. An integrated circuit with a SAR SRAM cell that has power routed in Metal-1 and has...
US-1,010,3152 Semiconductor device and method for fabricating the same
A Semiconductor device and method for fabricating the same are provided. The method includes forming a trench in a substrate, forming a lower gate metal using a...
US-1,010,3151 Embedded transistor
An embedded transistor for an electrical device, such as a DRAM memory cell, and a method of manufacture thereof is provided. A trench is formed in a substrate...
US-1,010,3150 Semiconductor device having insulating layer higher than a top surface of the substrate, and method for...
The present invention provides a semiconductor structure including a substrate defining a memory cell region and a peripheral region, a periphery gate stacking...
US-1,010,3149 Memory device comprising electrically floating body transistor
A semiconductor memory cell comprising an electrically floating body. A method of operating the memory cell is provided.
US-1,010,3148 NAND string utilizing floating body memory cell
NAND string configurations and semiconductor memory arrays that include such NAND string configurations are provided. Methods of making semiconductor memory...
← Previous | 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 | Next →

File A Patent Application

  • Protect your idea -- Don't let someone else file first. Learn more.

  • 3 Easy Steps -- Complete Form, application Review, and File. See our process.

  • Attorney Review -- Have your application reviewed by a Patent Attorney. See what's included.