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Patent # Description
US-1,013,4624 Substrate alignment detection using circumferentially extending timing pattern
Apparatus and method for aligning a rotatable substrate to a support mechanism to write a feature to the substrate, and a substrate so configured. In some...
US-1,013,4623 On the fly automatic wafer centering method and apparatus
Substrate processing apparatus including a wafer transport apparatus with a transport arm including an end effector, an arm pose deterministic feature integral...
US-1,013,4622 Apparatus and method for ascertaining orientation errors
A device for determining alignment errors of structures which are present on, or which have been applied to a substrate, comprising a substrate holder for...
US-1,013,4621 Substrate transport apparatus
A transfer apparatus including a frame, multiple arms connected to the frame, each arm having an end effector and an independent drive axis for extension and...
US-1,013,4620 Robot system and incline detection method
A robot system includes: a robotic hand configured to load and unload a workpiece into and from a cassette in which a plurality of workpieces are aligned in a...
US-1,013,4619 Connecting mechanism and connecting method of substrate container
A connecting mechanism includes a mounting unit, a substrate transfer port, a door closing or opening the substrate transfer port, a coupling mechanism coupling...
US-1,013,4618 Substrates storing container
The bottom plate has a plate-like shape, is arranged to face an outer face of a lower wall, and has a locking portion. The groove member has: a groove-forming...
US-1,013,4617 Wafer carrier having thermal cover for chemical vapor deposition systems
The invention relates generally to semiconductor fabrication technology and, more particularly, to chemical vapor deposition (CVD) processing and associated...
US-1,013,4615 Substrate support with improved RF return
Apparatus for processing a substrate are provided herein. In some embodiments, a substrate support includes a body having a support surface; an RF electrode...
US-1,013,4614 Substrate peripheral portion measuring device, and substrate peripheral portion polishing apparatus
A projecting/receiving unit (52) projects a laser light to a peripheral portion (30) and receives the reflected light while a liquid is being fed to a substrate...
US-1,013,4613 Cluster tool apparatus and a method of controlling a cluster tool apparatus
A system and method for a cluster tool apparatus for processing a semiconductor product including processing modules located adjacent each other and configured...
US-1,013,4612 Semiconductor manufacturing apparatus and method of manufacturing semiconductor device
In one embodiment, a semiconductor manufacturing apparatus includes a support module configured to support a wafer having first and second faces. The apparatus...
US-1,013,4611 Collector for use with an apparatus for treating wafer-shaped articles
A collector assembly for use with a spin chuck includes a base component, a top component and a first intermediate component configured to be fitted between the...
US-1,013,4610 Substrate processing method for drying a substrate by discharging gas to liquid layer on the substrate while...
After a development liquid on a substrate is washed away with a rinse liquid, the rotational speed of the substrate is reduced, so that a liquid layer of the...
US-1,013,4609 Substrate transporting device, substrate treating apparatus, and substrate transporting method
Disclosed is a substrate transporting device including a transport mechanism, a transport chamber, a first exhaust fan, and a controller. The transport...
US-1,013,4608 Power electronic switching device and power semiconductor module therewith
A switching device and a power semiconductor module are configured with a substrate, a power semiconductor component arranged thereupon and with a load...
US-1,013,4607 Method for low temperature bonding of wafers
A method for bonding wafers is provided. The method comprises the steps of providing a first wafer having an exposed first layer, the first layer comprising a...
US-1,013,4606 Method of forming patterns and method of manufacturing integrated circuit device using the same
A method of forming patterns may use an organic reflection-preventing film including a polymer having an acid-liable group. A photoresist film is formed on the...
US-1,013,4605 Dual chamber plasma etcher with ion accelerator
The embodiments herein generally deal with semiconductor processing methods and apparatus. More specifically, the embodiments relate to methods and apparatus...
US-1,013,4604 Semiconductor device and method
A method includes forming a metal gate structure over a first fin, where the metal gate structure is surrounded by a first dielectric material, and forming a...
US-1,013,4603 Method of planarising a surface
In an embodiment, a method of planarizing a surface includes applying a first layer to a surface including a protruding region including at least one compound...
US-1,013,4602 Process for smoothing the surface of a structure
A process for smoothing a silicon-on-insulator structure comprising the exposure of a surface of the structure to an inert or reducing gas flow and to a high...
US-1,013,4601 Zinc oxide-based mask for selective reactive ion etching
Embodiments herein describe techniques for forming a zinc oxide mask used when performing RIE. In one embodiment, the zinc oxide mask is near-amorphous which...
US-1,013,4600 Dielectric contact etch
A method for forming a semiconductor device in a plasma processing chamber is provided. An atomic layer etch selectively etches SiO with respect to SiN and...
US-1,013,4599 Self-anchored catalyst metal-assisted chemical etching
A method of metal-assisted chemical etching comprises forming an array of discrete metal features on a surface of a semiconductor structure, where each discrete...
US-1,013,4598 Method for manufacturing semiconductor device
As a first grinding step, a peripheral portion of a back surface of a wafer (1) is ground with a first grindstone (17) to form a fractured layer (19) in the...
US-1,013,4597 Apparatuses including memory cells with gaps comprising low dielectric constant materials
Various embodiments include apparatuses and electronic devices. One such apparatus can include a first dielectric material and a second dielectric material, and...
US-1,013,4596 Recessed solid state apparatuses
In some embodiments, an apparatus includes a first layer with a first surface and a second surface opposite to the first surface. The apparatus also includes a...
US-1,013,4595 High aspect ratio gates
Embodiments are directed to a method of forming a feature of a semiconductor device. In one or more embodiments, the feature is a gate, and the method includes...
US-1,013,4594 Method for manufacturing an electrical contact on a structure
The invention relates to a method for manufacture of an electrical contact on a structure (10) made of an anisotropic material NA which exhibits an anisotropic...
US-1,013,4593 Semiconductor device and method for manufacturing same
A semiconductor device includes: a substrate having a cell region with a semiconductor element and an outer peripheral region; and a drift layer on the...
US-1,013,4592 Resist having tuned interface hardmask layer for EUV exposure
A method is disclosed to prepare a substrate for photolithography. The method includes forming an underlayer over a surface of the substrate; depositing an...
US-1,013,4591 Method for manufacturing a semiconductor device
This invention is directed toward a method for manufacturing a semiconductor device with a heterostructure comprises covering a semiconductor structure with a...
US-1,013,4590 Methods of growing CdTe-based materials at high rates
Systems and methods for growing high-quality CdTe-based materials at high growth rates are provided. According to an aspect of the invention, a method includes...
US-1,013,4589 Polycrystalline ceramic substrate and method of manufacture
A method of fabricating a ceramic substrate structure includes providing a ceramic substrate, encapsulating the ceramic substrate in a barrier layer, and...
US-1,013,4588 Imprint resist and substrate pretreatment for reducing fill time in nanoimprint lithography
Facilitating throughput in nanoimprint lithography processes by using an imprint resist including fluorinated components and a substrate treated with a...
US-1,013,4587 Method of manufacturing semiconductor device
There is provided a method of manufacturing a semiconductor device, including: transferring a substrate to a module having a first process chamber and a second...
US-1,013,4586 Method of manufacturing semiconductor device, substrate processing apparatus, and recording medium
A technique includes forming a laminated film on a substrate by performing a cycle a predetermined number of times. The cycle includes forming a first film...
US-1,013,4585 Low temperature atomic layer deposition of oxides on compound semiconductors
Surface pretreatment of SiGe or Ge surfaces prior to gate oxide deposition cleans the SiGe or Ge surface to provide a hydrogen terminated surface or a sulfur...
US-1,013,4584 Method of manufacturing semiconductor device, substrate processing apparatus, and recording medium
A method of manufacturing a semiconductor device includes forming a seed layer on a substrate by alternately performing supplying a halogen-based first process...
US-1,013,4583 Methods of forming a low-k dielectric layer and methods of fabricating a semiconductor device using the same
A method of forming a dielectric layer includes forming a preliminary dielectric layer on a substrate using a silicon precursor and performing an energy...
US-1,013,4582 Tantalum compound and methods of forming thin film and fabricating integrated circuit device by using the same
A tantalum compound, a method of forming a thin film, and a method of fabricating an integrated circuit device, the tantalum compound being represented by the...
US-1,013,4581 Methods and apparatus for selective dry etch
Methods for forming a spacer comprising depositing a film on the top, bottom and sidewalls of a feature and treating the film to change a property of the film...
US-1,013,4580 Metallization levels and methods of making thereof
Structures for metallization levels of integrated circuits and associated fabrication methods. A first metallization level with a metallization line is formed....
US-1,013,4579 Method for high modulus ALD SiO2 spacer
Methods and apparatuses for forming high modulus silicon oxide spacers using atomic layer deposition are provided. Methods involve depositing at high...
US-1,013,4578 Housing and substrate processing apparatus including the same
According to an embodiment of the present disclosure, a substrate processing apparatus including a housing is provided. The housing having an internal...
US-1,013,4577 Edge trim processes and resultant structures
Edge trim processes in 3D integrated circuits and resultant structures are provided. The method includes trimming an edge of a wafer at an angle to form a...
US-1,013,4576 Integrated sample processing for electrospray ionization devices
Methods, systems and devices that generate differential axial transport in a fluidic device having at least one fluidic sample separation flow channel and at...
US-1,013,4575 Apparatus and method for thermal assisted desorption ionization systems
The present invention is directed to a method and device to desorb an analyte using heat to allow desorption of the analyte molecules, where the desorbed...
US-1,013,4574 Pre-filter fragmentation
A method of fragmenting ions is disclosed comprising providing a linear ion trap comprising: (i) a first electrode set comprising a plurality of first...
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