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Patent # Description
US-1,013,3704 Dynamic layout of content in a grid based application
Content items are obtained and dynamically arranged in tiles within columns (e.g. columns of a same size) on a display. The obtained items, along with...
US-1,013,3703 Anomaly detection method, program, and system
A method providing an analytical technique introducing label information into an anomaly detection model. Effective utilization of label information is based on...
US-1,013,3702 System and method for determining sensor margins and/or diagnostic information for a sensor
Systems and techniques for determining sensing margins and/or diagnostic information associated with a sensor are presented. A statistics component generates...
US-1,013,3701 Apparatus and method for automatically aligning data signals and strobe signals on a source synchronous bus
An apparatus is provided that compensates for misalignment on a synchronous data bus. The apparatus includes a replica radial distribution element, a Joint Test...
US-1,013,3700 Source synchronous data strobe misalignment compensation mechanism
An apparatus is provided that compensates for misalignment on a synchronous data bus, the apparatus includes a replica radial distribution element, a bit lag...
US-1,013,3699 Hot-plug of devices in virtualized computer systems
A system and method for enabling hot-plugging of devices in virtualized systems. A hypervisor obtains respective values representing respective quantities of a...
US-1,013,3698 Hot-plug capable input and output (IO) subsystem
An IO subsystem chassis includes IO modules and IO slots to receive the IO modules inserted from a frontend of a housing, a baseboard disposed within the...
US-1,013,3697 Computer architecture to provide flexibility and/or scalability
Apparatus, systems, and/or methods may include a peripheral component interconnect express (PCIe) link to directly couple a slot with a network fabric. The slot...
US-1,013,3696 Bridge, an asynchronous channel based bus, and a message broker to provide asynchronous communication
In a system and method for using a bridge, an asynchronous channel based bus, and a message broker to provide asynchronous communication, the bridge monitors at...
US-1,013,3695 Link system for establishing high speed network communications and file transfer between hosts using I/O device...
A High Speed Link System providing network and data transfer capabilities, implemented via standard input/output (I/O) device controllers, protocols, cables and...
US-1,013,3694 Peripheral component interconnect express (PCIE) pseudo-virtual channels using vendor defined messages
Embodiments of the present disclosure use vendor defined messages (VDMs) to send high priority information (e.g., cache writebacks) on a designated channel that...
US-1,013,3693 Coordinating memory operations using memory-device generated reference signals
A memory system includes a memory controller coupled to multiple memory devices. Each memory device includes an oscillator that generates an internal reference...
US-1,013,3692 Device including a single wire interface and a data processing system having the same
A system including: a master device configured to generate a first signal having a periodic pulse, wherein the first signal includes data; and a slave device...
US-1,013,3691 Synchronous input/output (I/O) cache line padding
A computer-implemented method for synchronous input/output (I/O) cache line padding is described. The cache line padding occurs between a server having a...
US-1,013,3690 Adaptive buffering of data received from a sensor
In a method of adaptive buffering in a mobile device having a host processor and a sensor processor coupled with the host processor, the sensor processor is...
US-1,013,3689 Electronic device and method for fabricating the same
This technology provides a method for fabricating an electronic device. A method for fabricating an electronic device including a variable resistance element,...
US-1,013,3688 Method and apparatus for transmitting information
The present application discloses a method and an apparatus for transmitting information. A specific implementation of the method includes: sending first...
US-1,013,3687 Communication apparatus and data processing method
A communication apparatus comprises a general-purpose memory, and a high-speed memory that allows higher-speed access than the general-purpose memory. Protocol...
US-1,013,3686 Multilevel memory bus system
The present invention relates to a multilevel memory bus system for transferring information between at least one DMA controller and at least one solid-state...
US-1,013,3685 Bus interface device that merges data request signals, semiconductor integrated circuit device including the...
A bus interface device for requesting and receiving data from a memory controller connected to a bus includes a request buffer and a request merger. The request...
US-1,013,3684 Integrated circuit having ADC, DSP and computing units
An integrated circuit, preferably for controlling vehicle functions, having an analog-digital converter for converting an analog signal into digital measurement...
US-1,013,3683 Seamless interface for hardware and software data transfer
An interface, a method, and a system are provided. In one or more aspects, the interface is for data transfer between simulation software and a hardware...
US-1,013,3682 Managing grouped student devices with timed locks
Systems and methods presented here can allow a teacher to schedule the locking of one or more student devices into an asset at some time in the future. A...
US-1,013,3681 Using encryption keys to manage data retention
Systems and methods for using encryption keys to manage data retention are described. In one embodiment, the systems and methods may include receiving data such...
US-1,013,3680 Data storage apparatus, coding unit, systems including the same, method of coding and method of reading data
In one embodiment, the data storage apparatus includes a control unit configured to decode at least one input command and configured to generate at least one of...
US-1,013,3679 Read cache management method and apparatus based on solid state drive
A read cache management method and apparatus based on a solid state drive, and the method includes: determining whether a read request hits a first queue and a...
US-1,013,3678 Method and apparatus for memory management
In some embodiments, a method of managing cache memory includes identifying a group of cache lines in a cache memory, based on a correlation between the cache...
US-1,013,3677 Opportunistic migration of memory pages in a unified virtual memory system
Techniques are disclosed for transitioning a memory page between memories in a virtual memory subsystem. A unified virtual memory (UVM) driver detects a page...
US-1,013,3676 Cache memory that supports tagless addressing
Embodiments related to a cache memory that supports tagless addressing are disclosed. Some embodiments receive a request to perform a memory access, wherein the...
US-1,013,3675 Data processing apparatus, and a method of handling address translation within a data processing apparatus
A data processing apparatus and method are provided for performing address translation in response to a memory access request issued by processing circuitry of...
US-1,013,3674 System and method for one step address translation of graphics addresses in virtualization
A system and method including, in some embodiments, receiving a request for a graphics memory address for an input/output (I/O) device assigned to a virtual...
US-1,013,3673 Cache optimization based on predictive routing
The embodiments implement file size variance caching optimizations. The optimizations are based on a differentiated caching implementation involving a small...
US-1,013,3672 System and method for efficient pointer chasing
Described is a system and method for efficient pointer chasing in systems having a single memory node or a network of memory nodes. In particular, a pointer...
US-1,013,3671 Proxy cache conditional allocation
A system and method are disclosed that include a bridge that translates non-coherent transactions, which are received from a non-coherent subsystem, into one or...
US-1,013,3670 Low overhead hierarchical connectivity of cache coherent agents to a coherent fabric
In an example, a system-on-a-chip comprises a plurality of multi-core processors, such as four dual-core processors for eight total cores. Each of the...
US-1,013,3669 Sequential data writes to increase invalid to modified protocol occurrences in a computing system
An example system on a chip (SoC) includes a cache, a processor, and a predictor circuit. The cache may store data. The processor may be coupled to the cache...
US-1,013,3668 Technologies for providing cross data storage device communications
Technologies for providing cross data storage device communication include a compute device to transmit, with a processor, a move request to a first data...
US-1,013,3667 Efficient data storage and retrieval using a heterogeneous main memory
Techniques related to efficient data storage and retrieval using a heterogeneous main memory are disclosed. A database includes a set of persistent format (PF)...
US-1,013,3666 File storage method and apparatus
A file storage method includes: splitting each of multiple files into one or more file block objects with different sizes; and writing the file block objects...
US-1,013,3665 Data storage device including nonvolatile memory device and operating method thereof
A method of operating a data storage device includes programming non-fully programmed memory blocks at a point in time when a reference time elapses from a...
US-1,013,3664 Method, flash memory controller, memory device for accessing 3D flash memory having multiple memory chips
A method for accessing a flash memory module is provide. The flash memory module is a 3D flash memory module including a plurality of flash memory chips, each...
US-1,013,3663 Systems and methods for persistent address space management
Data is stored on a non-volatile storage media in a sequential, log-based format. The formatted data defines an ordered sequence of storage operations performed...
US-1,013,3662 Systems, methods, and interfaces for managing persistent data of atomic storage operations
A storage controller is configured to implement an atomic storage operation comprising a plurality of separate storage operations on a non-volatile storage...
US-1,013,3661 Self tuning adaptive bucket memory manager
Disclosed herein are system, method, and computer program product embodiments for adaptively self-tuning a bucket memory manager. An embodiment operates by...
US-1,013,3660 Dynamically allocated thread-local storage
Dynamically allocated thread storage in a computing device is disclosed. The dynamically allocated thread storage is configured to work with a process including...
US-1,013,3659 Proactive memory allocation
Technologies are described for performing proactive memory allocation (e.g., pre-allocation). Proactive memory allocation (e.g., proactive memory page...
US-1,013,3658 Garbage collection for data storage
Methods, systems, apparatus, including computer programs encoded on computer storage media, for reclaiming storage space in a storage environment. In one...
US-1,013,3657 Textual similarity based software program repair
According to an aspect of an embodiment, a method may include identifying a fault at a fault location in a software program using a test suite. The method may...
US-1,013,3656 Systems and methods for generating optimized covering arrays
This disclosure relates to systems and methods for generating covering arrays. By processing parameters and corresponding values pertaining to an application...
US-1,013,3655 Emulation of target system using JIT compiler and bypassing translation of selected target code blocks
An emulator handles problematic target code blocks by evaluating target system code for problematic target code blocks and bypassing translation of such blocks,...
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