Easy To Use Patents Search & Patent Lawyer Directory

At Patents you can conduct a Patent Search, File a Patent Application, find a Patent Attorney, or search available technology through our Patent Exchange. Patents are available using simple keyword or date criteria. If you are looking to hire a patent attorney, you've come to the right place. Protect your idea and hire a patent lawyer.

Searching:





Search by keyword, patent number, inventor, assignee, city or state:




Patent # Description
US-1,014,1344 Semiconductor device and method of manufacturing the same
A semiconductor device having favorable electric characteristics is provided. The semiconductor device includes a first transistor and second transistor. The...
US-1,014,1343 Oxide semiconductor, thin film transistor, and display device
An object is to control composition and a defect of an oxide semiconductor, another object is to increase a field effect mobility of a thin film transistor and...
US-1,014,1342 Semiconductor device and display device
A semiconductor device capable of detecting a minute current with high accuracy is provided. The semiconductor device includes a first circuit, a second...
US-1,014,1341 Thin-film-transistor (TFT) array panel with stress elimination layer and method of manufacturing the same
The present invention provides a thin-film-transistor (TFT) array panel and manufacturing method of the same. The TFT array panel comprises a flexible...
US-1,014,1340 Thin-film-transistor, thin-film-transistor array substrate, fabricating methods thereof, and display panel
In accordance with some embodiments of the disclosed subject matter, a TFT, a related TFT array substrate, fabricating methods thereof, a display panel and a...
US-1,014,1339 Embedded security circuit formed by directed self-assembly
Embedded security circuits formed by directed self-assembly and methods for creating the same are provided herein. An example integrated circuit includes a set...
US-1,014,1338 Strained CMOS on strain relaxation buffer substrate
A FinFET device includes a strain relaxation buffer (SRB) substrate. A set of cut silicon fins is on the SRB substrate. Each fin in the set of cut silicon fins...
US-1,014,1337 Semiconductor device
A nitride insulating film which prevents diffusion of hydrogen into an oxide semiconductor film in a transistor including an oxide semiconductor is provided....
US-1,014,1336 Power gate switching system
A semiconductor device includes: a virtual power line extended in a first direction; an n-well extended in the first direction, wherein the virtual power line...
US-1,014,1335 Semiconductor CIP including region having rectangular-shaped gate structures and first metal structures
Gate structures formed from substantially rectangular shaped gate structure layout shapes positioned on a gate horizontal grid having at least seven gate...
US-1,014,1334 Semiconductor chip including region having rectangular-shaped gate structures and first-metal structures
Gate structures are positioned within a region in accordance with a gate horizontal grid that includes at least seven gate gridlines separated from each other...
US-1,014,1333 Domain wall control in ferroelectric devices
A ferroelectric device includes a first electrode and a second electrode that each comprise one or more electrically conductive layers. The ferroelectric device...
US-1,014,1332 Manufacturing method for semiconductor device having hole penetrating stack structure
A manufacturing method for a semiconductor device includes forming a first stacked structure, forming a first hole penetrating the first stacked structure,...
US-1,014,1331 Three-dimensional memory device containing support pillars underneath a retro-stepped dielectric material and...
A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, the...
US-1,014,1330 Methods of forming semiconductor device structures, and related semiconductor device structures, semiconductor...
A method of forming a semiconductor device structure comprises forming a stack structure comprising stacked tiers. Each of the stacked tiers comprises a first...
US-1,014,1329 Method for manufacturing semiconductor memory device and semiconductor memory device
According to one embodiment, a method for manufacturing a semiconductor memory device includes simultaneously forming a plurality of first holes and a plurality...
US-1,014,1328 Three dimensional memory device and method for fabricating the same
A 3D memory device includes a substrate, a ridge-shaped stack, a memory layer, a channel layer and a capping layer. The ridge-shaped stack includes a plurality...
US-1,014,1327 Semiconductor memory device
According to an embodiment, a semiconductor memory device comprises: an insulating layer disposed on a semiconductor substrate; a plurality of memory cell...
US-1,014,1326 Semiconductor memory device
A semiconductor memory device includes a peripheral circuit element provided over a lower substrate; an upper substrate provided over an interlayer dielectric...
US-1,014,1325 Method of manufacturing semiconductor device
A performance of a semiconductor device is improved. A film, which is made of silicon, is formed in a resistance element formation region on a semiconductor...
US-1,014,1324 Semiconductor device
A semiconductor memory array includes a first nonvolatile memory cell having a first charge storage layer and a first gate electrode and a second nonvolatile...
US-1,014,1323 Non-volatile memory and method of manufacturing the same
A semiconductor device is provided. The semiconductor device comprises a first active region, a second active region and a third active region, a first poly...
US-1,014,1322 Metal floating gate composite 3D NAND memory devices and associated methods
A 3D NAND memory structure having improved process margin and enhanced performance is provided. Such a memory structure can include a control gate material and...
US-1,014,1321 Method of forming flash memory with separate wordline and erase gates
A method of forming a non-volatile memory cell includes forming spaced apart first and second regions in a substrate, defining a channel region there between. A...
US-1,014,1320 Multiple-bit electrical fuses
A method for forming a semiconductor device includes forming a nanosheet stack comprising alternating layers of a first material and a second material on a...
US-1,014,1319 Layout pattern for static random access memory
A layout pattern of a static random access memory includes a pull-up device, a first pull-down device, a second pull-up device, a second pull-down device, a...
US-1,014,1318 Structure and method for FinFET SRAM
A semiconductor device comprises four SRAM cells in four quadrants of a region of the semiconductor device, wherein the four SRAM cells include FinFET...
US-1,014,1317 Metal layers for a three-port bit cell
An apparatus includes a first metal layer coupled to a bit cell. The apparatus also includes a third metal layer including a write word line that is coupled to...
US-1,014,1316 Semiconductor device with pillar and background patterns and method for fabricating the same
A semiconductor device includes a substrate including spaced-apart active regions, and device isolating regions isolating the active regions from each other,...
US-1,014,1315 Semiconductor memory device having an electrically floating body transistor
An IC may include an array of memory cells formed in a semiconductor, including memory cells arranged in rows and columns, each memory cell may include a...
US-1,014,1314 Memories and methods to provide configuration information to controllers
A memory system includes a memory controller and a memory module coupled to the memory controller. One such memory module may include a memory package of a...
US-1,014,1313 FinFET with uniform shallow trench isolation recess
Disclosed herein are processes and structures for uniform STI recessing. A method of making a semiconductor device includes initially forming a dense region of...
US-1,014,1312 Semiconductor devices including insulating materials in fins
Semiconductor devices are provided. A semiconductor device includes a first insulating material in a first fin. The semiconductor device includes a second...
US-1,014,1311 Techniques for achieving multiple transistor fin dimensions on a single die
Techniques are disclosed for achieving multiple fin dimensions on a single die or semiconductor substrate. In some cases, multiple fin dimensions are achieved...
US-1,014,1310 Short channel effect suppression
A method of fabricating a semiconductor device includes forming a plurality of isolation features on a semiconductor substrate, thereby defining a first set of...
US-1,014,1309 Tight pitch inverter using vertical transistors
CMOS inverters including gate-all-around vertical transistors are fabricated without requiring center gate contacts, thereby allowing close positioning of the...
US-1,014,1308 Low resistance source/drain contacts for complementary metal oxide semiconductor (CMOS) devices
A method for fabricating a semiconductor device includes accessing source/drain regions (S/D) in an n-type field effect transistor (NFET) region and in a p-type...
US-1,014,1307 Semiconductor device and manufacturing method thereof
A semiconductor device includes an isolation layer, first and second fin structures, a gate structure and a source/drain structure. The isolation layer is...
US-1,014,1306 Systems, methods, and apparatus for improved finFETs
To avoid the problems associated with low density spin on dielectrics, some examples of the disclosure include a finFET with an oxide material having different...
US-1,014,1305 Semiconductor devices employing field effect transistors (FETs) with multiple channel structures without...
Semiconductor devices employing Field Effect Transistors (FETs) with multiple channel structures without shallow trench isolation (STI) void-induced electrical...
US-1,014,1304 Semiconductor device
A small semiconductor device having a diode forward voltage less likely to change due to a gate potential is provided. An anode and an upper IGBT structure...
US-1,014,1303 RF amplifier package with biasing strip
An RF semiconductor amplifier package includes a flange shaped body section, an electrically conductive die pad centrally located on the body section, and an...
US-1,014,1302 High current, low switching loss SiC power module
A power module includes a housing with an interior chamber and multiple switch modules mounted within the interior chamber of the housing. The switch modules...
US-1,014,1301 Cross-domain ESD protection
Semiconductor devices with cross-domain electrostatic discharge (ESD) protection and related fabrication methods are provided. An exemplary semiconductor device...
US-1,014,1300 Low capacitance transient voltage suppressor
A transient voltage suppressor (TVS) circuit includes a P-N junction diode and a silicon controlled rectifier (SCR) formed integrated in a lateral device...
US-1,014,1299 Semiconductor device with protective element portion
In a circuit portion, a p.sup.+-type diffusion region penetrates, in the depth direction, an n.sup.--type base region on the front side of a base substrate and...
US-1,014,1298 Semiconductor integrated circuit device relating to an electrical over stress protecting circuit
A semiconductor integrated circuit device may include a first discharging unit and a second discharging unit. The first discharging unit may be coupled between...
US-1,014,1297 Integrated device comprising device level cells with variable sizes for heat dissipation around hotspots
An integrated device that includes a substrate, a device level layer formed over the substrate, and interconnect portion over the device level layer. The device...
US-1,014,1296 Dummy fin cell placement in an integrated circuit layout
In a method of forming an integrated circuit (IC) layout, an empty region in the IC layout is identified by a processor circuit, wherein the empty region is a...
US-1,014,1295 Method for manufacturing semiconductor device
To improve the assemblability of a semiconductor device. When a memory chip is mounted over a logic chip, a recognition range including a recognition mark...
← Previous | 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 | Next →

File A Patent Application

  • Protect your idea -- Don't let someone else file first. Learn more.

  • 3 Easy Steps -- Complete Form, application Review, and File. See our process.

  • Attorney Review -- Have your application reviewed by a Patent Attorney. See what's included.