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Patent # Description
US-1,014,1239 Thermal dissipation through seal rings in 3DIC structure
A package includes a die, which includes a semiconductor substrate, a plurality of through-vias penetrating through the semiconductor substrate, a seal ring...
US-1,014,1238 Semiconductor power device including adjacent thermal substrate for thermal impedance reduction
A semiconductor power device including a base plate, a semiconductor power die disposed on the base plate, an input lead by way the semiconductor power die...
US-1,014,1237 Fingerprint recognition module and manufacturing method therefor
This application provides a fingerprint recognition module and a manufacturing method therefor. The fingerprint recognition module includes a flexible printed...
US-1,014,1236 Flip chip ball grid array with low impedence and grounded lid
A contact spring for placement in a gap between an electrical substrate opposite a lid (electrically conductive heat spreader) of an electronic device comprises...
US-1,014,1235 Semiconductor device and method for manufacturing the same
Semiconductor layer 110 is formed on semiconductor substrate 101. Semiconductor layer 110 has a plurality of well regions 103 in a surface remote from...
US-1,014,1234 Flipped vertical field-effect-transistor
Various embodiments disclose a method for fabricating vertical transistors. In one embodiment, a structure is formed comprising at least a first substrate, an...
US-1,014,1233 Electronic package and fabrication method thereof
An electronic package is provided, which includes: a first circuit structure; a plurality of first electronic elements disposed on a surface of the first...
US-1,014,1232 Vertical CMOS devices with common gate stacks
A semiconductor structure includes a first nanowire of a first material formed on a substrate, at least a second nanowire of a second material different than...
US-1,014,1231 FinFET device with wrapped-around epitaxial structure and manufacturing method thereof
A method includes forming two fins extending from a substrate, each fin having two source/drain (S/D) regions and a channel region; forming a gate stack...
US-1,014,1230 Method and structure to enable dual channel Fin critical dimension control
A method for manufacturing a semiconductor device includes forming a first semiconductor layer on a substrate having a {100} crystallographic surface...
US-1,014,1229 Process for forming semiconductor layers of different thickness in FDSOI technologies
In fully depleted SOI transistors, specifically designed semiconductor materials may be provided for different types of transistors, thereby, for instance,...
US-1,014,1228 FinFET device having single diffusion break structure
A semiconductor device includes: a fin-shaped structure on a substrate; a single diffusion break (SDB) structure in the fin-shaped structure to divide the...
US-1,014,1227 Method and system for achieving semiconductor-based circuits or systems having multiple components with one or...
Methods and systems for achieving semiconductor-based circuits or systems having multiple components with one or more matched or similar characteristics or...
US-1,014,1226 Self-aligned contacts
A transistor comprises a substrate, a pair of spacers on the substrate, a gate dielectric layer on the substrate and between the pair of spacers, a gate...
US-1,014,1225 Metal gates of transistors having reduced resistivity
A method includes forming a transistor, which includes forming a gate dielectric on a semiconductor region, forming a gate electrode over the gate dielectric,...
US-1,014,1224 Manufacturing method of interconnection structure
An interconnection structure and a manufacturing method thereof are provided. The method includes the following steps. First, a substrate having a first surface...
US-1,014,1223 Method of improving micro-loading effect when recess etching tungsten layer
A method of improving micro-loading effect when recess etching a tungsten layer. A substrate having trenches thereon is provided. A tungsten layer is deposited...
US-1,014,1222 Semiconductor device and method of forming conductive vias through interconnect structures and encapsulant of WLCSP
A semiconductor device has a semiconductor die mounted over the carrier. An encapsulant is deposited over the carrier and semiconductor die. The carrier is...
US-1,014,1221 Method for manufacturing three dimensional stacked semiconductor structure and structure manufactured by the same
A method of manufacturing a three-dimensional (3D) stacked semiconductor structure is provided. A multi-layered stack is formed above a substrate, and the...
US-1,014,1220 Via patterning using multiple photo multiple etch
A method includes forming a dielectric layer, forming a photo resist over the dielectric layer, forming a first mask layer over the photo resist, and forming a...
US-1,014,1219 Combined production method for separating a number of thin layers of solid material from a thick solid body
A method for producing layers of solid material is contemplated. The production method may include the following: Providing a solid body to be split into a...
US-1,014,1218 Room temperature metal direct bonding
A bonded device structure including a first substrate having a first set of metallic bonding pads, preferably connected to a device or circuit, and having a...
US-1,014,1217 Dicing-tape integrated film for backside of semiconductor and method of manufacturing semiconductor device
The present invention is to provide a dicing-tape integrated film for the backside of a semiconductor that is capable of suppressing the increase of the peel...
US-1,014,1216 Room temperature debondable and thermally curable compositions
Embodiments in accordance with the present invention are directed to a method of fabricating a semiconductor device wherein a device wafer substrate is coated...
US-1,014,1215 Compliant needle for direct transfer of semiconductor devices
An apparatus includes a needle and a needle actuator to move the needle to a position at which the needle presses an electrically-actuatable element into...
US-1,014,1214 Dual scara arm
A substrate transport apparatus having a drive section and a scara arm operably connected to the drive section to move the scara arm. The scara arm has an upper...
US-1,014,1213 Apparatus for storing and handling article at ceiling
Disclosed herein is an apparatus for storing and handling an article at a ceiling, including: an internal rail configured to hang on the ceiling; a storage...
US-1,014,1212 Automated material handling system for semiconductor manufacturing based on a combination of vertical carousels...
A highly efficient Automated Material Handling System (AMHS) that allows an overhead hoist transport vehicle to load and unload Work-In-Process (WIP) parts...
US-1,014,1211 Substrate processing apparatus and substrate transfer method
A substrate processing apparatus comprises a transferring device including a grasping section configured to grasp a substrate holder, and a transferring section...
US-1,014,1210 Purge module and load port having the same
A purge module which can provide a conventional load port without a gas purging function with the gas purging function, and a load port having the purge module...
US-1,014,1209 Processing gas generating apparatus, processing gas generating method, substrate processing method, and storage...
The present disclosure provides an apparatus for generating a processing gas by bubbling a raw material liquid with a carrier gas. The processing gas generated...
US-1,014,1208 Vacuum processing apparatus
A vacuum processing apparatus includes a tilting unit configured to tilt, in a vacuum vessel, a substrate holder including a refrigerator, and a rotary joint...
US-1,014,1207 Operation method of plasma processing apparatus
A vacuum processing apparatus includes a processing chamber inside a vacuum vessel, a plasma forming chamber above, a dielectric plate member having multiple...
US-1,014,1206 Substrate processing apparatus and gap washing method
A substrate processing apparatus includes a washing liquid supply unit which supplies a washing liquid to a washing liquid discharge port which is open in the...
US-1,014,1205 Apparatus and method for cleaning semiconductor wafer
An apparatus and method for cleaning semiconductor wafer are provided. The apparatus includes a brush module, a swing arm, a rotating actuator and an elevating...
US-1,014,1204 Film, method for its production, and method for producing semiconductor element using the film
To provide a film which is excellent in releasing property with respect to a resin sealed portion and excellent in low migration property and peeling property...
US-1,014,1203 Electrical interconnect structure for an embedded electronics package
An electronics package includes a lower insulating layer, an upper insulating layer coupled to the lower insulating layer, and a conductive contact pad coupled...
US-1,014,1202 Semiconductor device comprising mold for top side and sidewall protection
Some implementations provide a semiconductor device that includes a substrate, several metal and dielectric layers coupled to the substrate, and a pad coupled...
US-1,014,1201 Integrated circuit packages and methods of forming same
Integrated circuit packages and methods of forming the same are disclosed. A first die is mounted on a first side of a package substrate. A heat dissipation...
US-1,014,1200 Methods of manufacturing semiconductor devices
In a method of manufacturing a semiconductor memory device, a plurality of first conductive structures including a first conductive pattern and a hard mask are...
US-1,014,1199 Selecting a substrate to be soldered to a carrier
A method for soldering an insulating substrate onto a substrate mounting portion of a carrier by a predefined solder is provided. The insulating substrate...
US-1,014,1198 Electronic package and manufacturing method thereof
An electronic package including a middle patterned conductive layer, a first redistribution circuitry disposed on a first surface of the middle patterned...
US-1,014,1197 Thermosonically bonded connection for flip chip packages
A method of making a package is disclosed. The method may include forming bond pads on a first surface of a substrate, forming leads in the substrate by etching...
US-1,014,1196 Power semiconductor device with thick top-metal-design and method for manufacturing such power semiconductor device
The present application contemplates a method for manufacturing a power semiconductor device. The method comprises: providing a wafer of a first conductivity...
US-1,014,1195 Substrate processing method
There is provided a substrate processing method performed on a substrate having a recess formed in a surface thereof, a first silicon-containing film formed on...
US-1,014,1194 Manufacturing method of semiconductor structure
A manufacturing method of a semiconductor structure includes the following steps. A first polysilicon layer is formed on a substrate. A planarization process to...
US-1,014,1193 Fabricating method of a semiconductor device with a high-K dielectric layer having a U-shape profile
A semiconductor device including a substrate, a spacer and a high-k dielectric layer having a U-shape profile is provided. The spacer located on the substrate...
US-1,014,1192 Manufacturing method of semiconductor device
When a nitride semiconductor layer into which impurity ions have been implanted is subjected to annealing after a protective film is provided on the nitride...
US-1,014,1191 Method of thermal processing structures formed on a substrate
The present invention generally describes one ore more methods that are used to perform an annealing process on desired regions of a substrate. In one...
US-1,014,1190 Manufacturing method of a semiconductor device
In a manufacturing method of a semiconductor device according to an embodiment, an oxide film is formed on a semiconductor layer containing an impurity. A heat...
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