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Patent # Description
US-1,015,3039 Memory cells programmed via multi-mechanism charge transports
The present disclosure includes memory cells programmed via multi-mechanism charge transports. An example apparatus includes a semiconductor material, a...
US-1,015,3038 Memory read stability enhancement with short segmented bit line architecture
In some embodiments, a semiconductor memory device includes an array of semiconductor memory cells arranged in rows and columns. The array includes a first...
US-1,015,3037 Multiport memory, memory macro and semiconductor device
A circuit includes a memory cell array which includes: a plurality of memory cells; a plurality of word lines coupled to the memory cells, respectively, and a...
US-1,015,3036 Method for autocorrective writing to a multiport static random access memory device, and corresponding device
An autocorrective writing to a multiport static random access memory device is performed on at least one multiport static random access memory cell circuit. A...
US-1,015,3035 SRAM-based authentication circuit
A memory device includes a memory cell array comprising a plurality of memory cells wherein each of the plurality of memory cells is configured to be in a data...
US-1,015,3034 Static random access memory unit structure
A static random access memory unit structure and layout structure includes two pull-up transistors, two pull-down transistors, two slot contact plugs, and two...
US-1,015,3033 Semiconductor devices
A semiconductor device includes a counter control signal generation circuit and an access information generation circuit. The counter control signal generation...
US-1,015,3032 Pump system of a DRAM and method for operating the same
The present disclosure provides a pump system of a DRAM and a method for operating the same. The pump system includes a pump device and a spare pump assembly....
US-1,015,3031 Apparatuses and methods for controlling refresh operations
An apparatus includes a first word line, a second word line and a control. The second word line is contiguous to the first word line. The control circuit...
US-1,015,3030 Apparatuses and methods for configurable command and data input circuits for semiconductor memories
Apparatuses and methods for configurable command and data input circuits for semiconductor memories are described. Example apparatuses include input signal...
US-1,015,3029 Nonvolatile memory devices and memory systems
A nonvolatile memory device includes a memory cell array, a voltage generator, a page buffer circuit, a row decoder and a control circuit. The memory cell array...
US-1,015,3028 Semiconductor devices
A semiconductor device may be provided. The semiconductor device may include an error scrub control circuit and or an active period signal generation circuit....
US-1,015,3027 Memory arrays, and methods of forming memory arrays
Some embodiments include an assembly having active material structures arranged in an array having rows and columns. Each of the active material structures has...
US-1,015,3026 Writing to cross-point non-volatile memory
Methods, systems, and devices for preventing disturb of untargeted memory cells during repeated access operations of target memory cells are described for a...
US-1,015,3025 Circuit and method for imprint reduction in FRAM memories
Disclosed embodiments include a memory device having a memory array that includes a first memory cell coupled to a first bit line and a second memory cell...
US-1,015,3024 Dynamic adjustment of memory cell digit line capacitance
Methods, systems, and devices for operating a ferroelectric memory cell or cells are described. A ferroelectric memory cell may be used to store a logic state....
US-1,015,3023 Cell-based reference voltage generation
Methods, systems, and devices for operating a ferroelectric memory cell or cells are described. A first ferroelectric memory cell may be initialized to a first...
US-1,015,3022 Time-based access of a memory cell
Techniques, systems, and devices for time-resolved access of memory cells in a memory array are described herein. During a sense portion of a read operation, a...
US-1,015,3021 Time-based access of a memory cell
Methods, systems, and devices for time-based access of memory cells in a memory array are described herein. During a sense portion of a read operation, a...
US-1,015,3020 Dual mode ferroelectric memory cell operation
Methods, systems, and devices for dual mode ferroelectric memory cell operation are described. A memory array or portions of the array may be variously operated...
US-1,015,3019 Compensation for threshold voltage variation of memory cell components
Methods, systems, and devices for operating a ferroelectric memory cell or cells are described. Before reading a memory cell, the voltage on an access line of...
US-1,015,3018 Ferroelectric memory cells
Apparatuses and methods are disclosed that include ferroelectric memory cells. An example ferroelectric memory cell includes two transistors and two capacitors....
US-1,015,3017 Method for sensing memory element coupled to selector device
The present invention is directed to a method for sensing the resistance state of a memory cell that includes an MTJ memory element coupled to a two-terminal...
US-1,015,3016 Apparatus of offset voltage adjustment in input buffer
Apparatuses for providing external terminals of a semiconductor device are described. An example apparatus includes an input pad, an input buffer including a...
US-1,015,3015 Managing disturbance induced errors
In an embodiment, a memory controller may determine that one or more neighboring memory cells associated with a target memory cell in a memory device are to be...
US-1,015,3014 DQS-offset and read-RTT-disable edge control
Devices, systems, and methods include controls for on-die termination (ODT) and data strobe signals. For example, a command to de-assert ODT for a data pin (DQ)...
US-1,015,3013 Data output buffer
A data output buffer may be provided. The data output buffer may include a pull-up circuit configured to output a pull-up feedback signal by pull-up driving an...
US-1,015,3012 Multiple register memory access instructions, processors, methods, and systems
A processor includes N-bit registers and a decode unit to receive a multiple register memory access instruction. The multiple register memory access instruction...
US-1,015,3011 Multiple register memory access instructions, processors, methods, and systems
A processor includes N-bit registers and a decode unit to receive a multiple register memory access instruction. The multiple register memory access instruction...
US-1,015,3009 Apparatuses and methods for performing logical operations using sensing circuitry
The present disclosure includes apparatuses and methods related to performing logical operations using sensing circuitry. An example apparatus comprises an...
US-1,015,3008 Apparatuses and methods for performing corner turn operations using sensing circuitry
The present disclosure includes apparatuses and methods related to performing corner turn operations using sensing circuitry. An example apparatus comprises a...
US-1,015,3007 Apparatuses including a memory array with separate global read and write lines and/or sense amplifier region...
Apparatuses and methods related to memory arrays with separate global read and write lines and/or sense amplifier region column select lines are disclosed. An...
US-1,015,3006 Stacked semiconductor device and control method for the same
A semiconductor device includes semiconductor chips stacked each other. Each of the semiconductor chips converts second reception data received by second...
US-1,015,3005 Container flange configurations with increased diffusion length for hermetic sealing of data storage systems...
A hermetically-sealed container for one or more data storage devices may include a first container part or base including a planar main portion, a plurality of...
US-1,015,3004 Playback system for video with replaceable commodities
A playback system for video with replaceable commodities includes a video server and a computer program product. The video server includes a video database, a...
US-1,015,3003 Method, system, and apparatus for generating video content
The present inventive subject matter is drawn to method, system, and apparatus for generating video content related to an audio media asset. In one aspect of...
US-1,015,3002 Selection of an audio stream of a video for enhancement using images of the video
An audio stream of a video is selected for enhancement using image of the video. In one example, audio streams in the video are identified and segregated....
US-1,015,3001 Video skimming methods and systems
In an embodiment, a method of creating a skimming preview of a video includes electronically receiving a plurality of video shots, analyzing each frame in a...
US-1,015,3000 In-band data recognition and synchronization system
A method and apparatus for recognizing and synchronizing to in-band data at a multimedia device is provided. A content stream includes in-band data. The in-band...
US-1,015,2999 Systems and methods for correlation based data alignment
A data processing system is disclosed including a data detector, a data decoder and an alignment detector. The data detector is operable to apply a data...
US-1,015,2998 Features maps of articles with polarized light
Provided herein is an apparatus including an imaging lens assembly configured to collect reflected light from a surface of an article; an image sensor...
US-1,015,2997 Laser current calibration using preamplifier
Systems and methods of laser bias calibration are presented. A preamplifier circuit may configure a laser current supplied to a laser emitter to be a first...
US-1,015,2996 Process for producing magnetic recording medium
The problem of the invention is to provide a process for producing a magnetic recording medium which exhibits both of excellent thermal stability and favorable...
US-1,015,2995 Magnetic tape device and head tracking servo method
The magnetic tape device includes a magnetic tape including a magnetic layer, in which an intensity ratio of a peak intensity of a diffraction peak of a (110)...
US-1,015,2994 Data storage device concurrently disconnecting multiple voice coil motors from spindle motor BEMF voltage...
A data storage device is disclosed comprising a first voice coil motor (VCM) comprising a first voice coil configured to actuate a first head over a first disk,...
US-1,015,2993 Save block data to tape in a reverse order
Linear Tape File System that can accommodate various storage orders, such as sequential and reverse sequential, on a tape medium. The storage order may be...
US-1,015,2992 Light source unit and thermally-assisted magnetic head
A light source unit for thermally-assisted magnetic head includes a support member and a light source attached on the support member via a solder, and the light...
US-1,015,2991 Method for manufacturing thermally-assisted magnetic recording head with waveguide blocker
A method for manufacturing a TAMR (thermal assisted magnetic recording) write head. The write head has a metal blocker formed against a distal end of a...
US-1,015,2990 Flatbed cutter assembly and a method therefor
A flatbed cutter assembly includes a medium support table for supporting a recording medium, the table extending in a first direction and a second direction,...
US-1,015,2989 Monitoring using a mobile device accessory
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for audience measurement using a mobile device accessory are...
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