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Patent # Description
US-1,017,0538 MIS capacitor
In one embodiment of the present invention, there is provided an MIS capacitor, including: a lower electrode formed with a semiconductor substrate having...
US-1,017,0537 Capacitor structure compatible with nanowire CMOS
A semiconductor device is provided that includes a pedestal of an insulating material present over at least one layer of a semiconductor material, and at least...
US-1,017,0536 Magnetic memory with metal oxide etch stop layer and method for manufacturing the same
A semiconductor structure is disclosed. The semiconductor structure includes: a substrate; a first passivation layer over the substrate; a second passivation...
US-1,017,0535 Active-matrix touchscreen
An active-matrix touchscreen includes a substrate, a system controller, and a plurality of spatially separated independent touch elements disposed on the...
US-1,017,0534 Display device
A display device includes: a substrate; a plurality of display elements in a display area of the substrate, where each of the plurality of display elements...
US-1,017,0532 EL display panel, power supply line drive apparatus, and electronic device
Disclosed herein is an electroluminescence display panel including a pixel circuit, a signal line, a scan line, a drive power supply line, a common power supply...
US-1,017,0531 Organic light emitting diode display including reaction blocking member on common voltage line
An organic light emitting diode ("OLED") display includes: a substrate divided into a pixel area, and a peripheral area enclosing the pixel area; an OLED in the...
US-1,017,0530 Display device including first and second substrates, one including a pad electrode
According to one embodiment, a display device includes a first substrate including as insulating substrate with a first through hole, a pad electrode positioned...
US-1,017,0528 Display panel and manufacturing method thereof
Provided is a novel display panel that is highly convenient or reliable. The display device has two display modes: a reflective display mode and a ...
US-1,017,0527 Organic light emitting diode display
An organic light emitting display device comprises a common voltage line formed over a peripheral region of a substrate; a passivation layer formed over a pixel...
US-1,017,0526 Organic light emitting diode display panel and method for manufacturing same
An organic light emitting diode (OLED) display panel and a method for manufacturing the OLED display panel are provided. The OLED display panel includes a thin...
US-1,017,0525 Organic light emitting display device
An organic light emitting display device includes a substrate, a gate insulation layer, a planarization layer, a boundary pattern, and a sub-pixel structure....
US-1,017,0524 Display device
A display device includes a display panel, a member, a first fixing portion, a second fixing portion, and a roll-up portion. The display device has a function...
US-1,017,0523 Touch sensitive display and method for manufacturing the same
The present invention relates to a touch sensitive display, which includes an upper substrate with a mask layer placed thereon, a touch sensing layer, a lower...
US-1,017,0522 High pixel density array architecture
What is disclosed is a pixel array architecture for displays being based on a matrix of subpixels arranged in a rectilinear matrix oriented at an angle relative...
US-1,017,0521 Organic light-emitting diode display device
An organic light-emitting diode display device according to an embodiment includes a substrate on which red, green and blue sub-pixel regions are defined, first...
US-1,017,0520 Negative-capacitance steep-switch field effect transistor with integrated bi-stable resistive system
Fabricating a negative capacitance steep-switch transistor includes receiving a semiconductor structure including a substrate, a fin, a source/drain, a gate, a...
US-1,017,0519 Magnetoresistive element and memory device
According to one embodiment, a magnetoresistive element includes a first metal layer having a body-centered cubic structure, a second metal layer having a...
US-1,017,0518 Self-assembled pattern process for fabricating magnetic junctions usable in spin transfer torque applications
Magnetic junctions usable in a magnetic device and a method for providing the magnetic junctions are described. A patterned seed layer is provided. The...
US-1,017,0517 Method for forming image sensor device
A method for forming an image sensor device on a substrate is disclosed. The method includes (a) recessing a portion of the substrate thereby forming a first...
US-1,017,0516 Image sensing device and method for fabricating the same
An image sensing device is provided. The image sensing device includes a substrate having a pixel array with a plurality of pixels. A light guide structure is...
US-1,017,0515 Implantation process for semiconductor device
A semiconductor device includes a substrate and a device. The substrate has a first surface and a second surface opposite to each other. The substrate includes...
US-1,017,0514 Image sensor
An image sensor comprises an array of pixels comprising: a pinned photodiode; a first sense node A; a second sense node B; a transfer gate TX connected between...
US-1,017,0513 Image sensor with vertical electrodes
An image sensor arranged inside and on top of a semi-conductor substrate having a front surface and a rear surface, the sensor including a plurality of pixels,...
US-1,017,0512 Uniform-size bonding patterns
A semiconductor device, and a method of fabrication, is introduced. In an embodiment, one or more passivation layers are formed over a first substrate. Recesses...
US-1,017,0511 Solid-state imaging devices having a microlens layer with dummy structures
A solid-state imaging device has a sensing region, a pad region and a peripheral region between the sensing region and the pad region. The solid-state imaging...
US-1,017,0510 Color separation element array, image sensor including the same, and electronic device
A color separation element array, an image sensor including the color separation element array, and an electronic device including the color separation element...
US-1,017,0509 Optical filter array
A device may include a filter array disposed on a substrate. The filter array may include a first mirror disposed on the substrate. The filter array may include...
US-1,017,0508 Optical package structure
An optical package structure is provided. The optical package structure includes a substrate, a frame layer, an optical unit, a bonding layer, a transparent...
US-1,017,0507 Solid-state imaging device
A solid-state imaging device has a plurality of micro lenses, a first substrate, and a second substrate. The first substrate has a plurality of first...
US-1,017,0506 LTPS array substrate and method for producing the same
An LTPS array substrate and a method for producing the same are proposed. The method includes: forming an insulating layer, a semiconductor layer, and a first...
US-1,017,0505 Display apparatus
A display apparatus capable of reducing a defect rate during manufacturing and utilizing thereof, the display apparatus includes a substrate comprising a...
US-1,017,0504 Manufacturing method of TFT array substrate, TFT array substrate and display device
Embodiments of the disclosure provide a manufacturing method of a TFT array substrate, a TFT array substrate and a display device. The TFT array substrate...
US-1,017,0503 Thin film transistor array substrate and liquid crystal panel
The present disclosure discloses a thin film transistor array substrate and a liquid crystal panel. The thin film transistor array substrate comprises a...
US-1,017,0502 Transistor array panel and manufacturing method thereof
A transistor array panel is manufactured by a method that reduces or obviates the need for highly selective etching agents or complex processes requiring...
US-1,017,0501 Display panel
A display panel is provided. The display panel includes a substrate including a non-display region containing a thin film transistor, which includes a...
US-1,017,0500 Transistor, liquid crystal display device, and manufacturing method thereof
Photolithography and etching steps for forming an island-shaped semiconductor layer are omitted, and a liquid crystal display device is manufactured with four...
US-1,017,0499 FinFET device with abrupt junctions
A plurality of semiconductor fins is formed on a surface of an insulator layer. Gate structures are then formed that are orientated perpendicular and straddle...
US-1,017,0498 Strained CMOS on strain relaxation buffer substrate
A method for constructing an advanced FinFET structure is described. A first long silicon fin for n-type FinFET devices and a first long silicon germanium fin...
US-1,017,0497 Method for manufacturing an electronic device and method for operating an electronic device
According to various embodiments, an electronic device may include a carrier including at least a first region and a second region being laterally adjacent to...
US-1,017,0496 Semiconductor device and manufacturing method thereof
A semiconductor device in accordance with an embodiment may include a cell structure, a source coupling structure, and a source discharge transistor. The cell...
US-1,017,0495 Stacked memory device, optical proximity correction (OPC) verifying method, method of designing layout of...
An optical proximity correction (OPC) verifying method including checking a first location of a first pattern in a layout of a stacked memory device,...
US-1,017,0494 Semiconductor device and method for manufacturing the same
According to one embodiment, a semiconductor device includes an underlying metal film and a metal film. The underlying metal film is a tantalum-aluminum film...
US-1,017,0493 Assemblies having vertically-stacked conductive structures
Some embodiments include a method in which an assembly is formed to have voids within a stack, and to have slits adjacent the voids. Peripheral boundaries of...
US-1,017,0492 Memory device and method for fabricating the same
A memory device includes a semiconductor substrate, a first conductive layer, a plurality of second conductive layers, a plurality insulating layers, at least...
US-1,017,0491 Memory including blocking dielectric in etch stop tier
Vertical memories and methods of making the same are discussed generally herein. In one embodiment, a vertical memory can include a vertical pillar extending to...
US-1,017,0490 Memory device including pass transistors in memory tiers
Some embodiments include apparatuses and methods of using such apparatuses. One of the apparatuses includes a semiconductor material, a pillar extending through...
US-1,017,0489 High-voltage transistor having shielding gate
A semiconductor device includes a plurality of high-voltage insulated-gate field-effect transistors arranged in a matrix form on the main surface of a...
US-1,017,0488 Non-volatile memory of semiconductor device and method for manufacturing the same
A semiconductor device includes a substrate and a floating gate memory cell. The floating gate memory cell includes an erase gate structure disposed on the...
US-1,017,0487 Device having an inter-layer via (ILV), and method of making same
A three-dimensional integrated circuit includes a first transistor, a word line, a first via, a second transistor, and a second via. The first transistor is on...
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