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Patent # Description
US-1,020,4933 Thin film transistor and method for manufacturing the same, and display panel
The application provides a thin film transistor, a method for manufacturing the thin film transistor, and a display panel, the thin film transistor includes a...
US-1,020,4932 Array substrate, manufacturing method thereof, display panel and display device
An array substrate and a manufacturing method thereof are provided. The array substrate includes a display area (02) and a fan-out area (01) disposed at the...
US-1,020,4931 Electrically conductive structure and manufacturing method thereof, array substrate, display device
The present disclosure provides an electrically conductive structure and a manufacturing method thereof, an array substrate, and a display device. The...
US-1,020,4930 Ultra high density thin film transistor substrate having low line resistance structure and method for...
A display device is described that has reduced resistance in one or more of the gate, common, data electrical lines that control the operation of the pixels of...
US-1,020,4929 Array substrate and display device
An array substrate and a display device are disclosed. The array substrate includes: a base substrate; gate lines and data lines disposed on the base substrate;...
US-1,020,4928 Display substrate, liquid crystal display panel and display apparatus having the same, and fabricating method...
The present application discloses a display substrate comprising a base substrate; a first electrode on the base substrate; a first insulating layer on a side...
US-1,020,4927 Display substrate, display device containing the same, and method for fabricating the same
The present disclosure provides a display substrate, including: a wiring mounting region. The wiring mounting region includes first wires and second wires, each...
US-1,020,4926 Display device and display panel
A display device that is resistant to erosion caused by moisture infiltration is provided. In the display device, a driver circuit unit includes a driver chip...
US-1,020,4925 Semiconductor device and electronic device
To provide a novel semiconductor device or a semiconductor device capable of operating at high speed. The semiconductor device includes a plurality of circuits...
US-1,020,4924 Thin film transistor, manufacturing method thereof, display substrate and display device
A thin film transistor (TFT), a manufacturing method thereof, a display substrate and a display device are disclosed. The TFT includes: a gate electrode; a gate...
US-1,020,4923 Thin-film-transistor (TFT) array panel with stress elimination layer and method of manufacturing the same
The present invention provides a thin-film-transistor (TFT) array panel and manufacturing method of the same. The TFT array panel comprises a flexible...
US-1,020,4922 Thin film transistor, array substrate and manufacturing method thereof, and display device
A metal oxide thin film transistor and a manufacturing method thereof, an array substrate and a manufacturing method thereof, and a display device are provided....
US-1,020,4921 Array substrate assembly and TFT display apparatus comprising the same
Embodiments of the present invention provide an array substrate assembly and a display apparatus including the array substrate assembly. The array substrate...
US-1,020,4920 Semiconductor device including polygon-shaped standard cell
A semiconductor device including a standard cell for implementing a logic element includes a first active region and a second active region extending in a...
US-1,020,4919 Vertical memory device
A vertical memory device is provided as follows. A substrate has a cell array region and a connection region adjacent to the cell array region. A first gate...
US-1,020,4918 Semiconductor device including different orientations of memory cell array and peripheral circuit transistors
A memory device includes a memory cell on a first region of a substrate. An active region is in a second region neighboring the first region of the substrate,...
US-1,020,4917 Method for manufacturing embedded non-volatile memory
In a method for manufacturing a semiconductor device, a cell well, a logic well and a high voltage well are formed in a first, a second and a third regions of a...
US-1,020,4916 Selective epitaxy growth for semiconductor devices with fin field-effect transistors (FinFET)
A method for forming a Fin field-effect transistor (FinFET) semiconductor structure includes performing an angled ion implantation process at a predetermined...
US-1,020,4915 Method of forming dynamic random access memory (DRAM)
A method of forming a dynamic random access memory (DRAM) includes the following steps. A substrate includes a memory area and a logic area. A stacked structure...
US-1,020,4914 Method for fabricating semiconductor device
A method for fabricating semiconductor device includes the steps of: providing a substrate having a memory region and a periphery region; forming a first buried...
US-1,020,4913 Method for forming buried bit line, semiconductor device having the same, and fabricating method thereof
A method for fabricating a semiconductor device includes: etching a semiconductor substrate and forming a plurality of bodies separated from one another by a...
US-1,020,4912 Micro-pattern forming method, capacitor and method of manufacturing the same, semiconductor device and method...
A method of forming a micro-pattern including forming a mold layer and a supporting material layer on a substrate, patterning the mold layer and the supporting...
US-1,020,4911 Method for fabricating capacitor
A method for fabricating a capacitor includes providing a substrate and a first etching stop layer on the substrate; forming a plurality of first spacers on the...
US-1,020,4910 Semiconductor device and method for fabricating the same
A semiconductor device is provided. The provided semiconductor device may have enhanced reliability and operating characteristics. The semiconductor device...
US-1,020,4909 Non-uniform gate oxide thickness for DRAM device
Provided herein are approaches for forming a gate oxide layer for a DRAM device, the method including providing a finned substrate having a recess formed...
US-1,020,4908 Compact semiconductor memory device having reduced number of contacts, methods of operating and methods of making
An integrated circuit including a link or string of semiconductor memory cells, wherein each memory cell includes a floating body region for storing data. The...
US-1,020,4907 Metal-insulator-metal capacitor analog memory unit cell
A memory device including a plurality of memory unit cells arranged in a crossbar configuration for a neural network is provided. Each of the memory unit cells...
US-1,020,4906 Memory with single-event latchup prevention circuitry
An integrated circuit that includes an array of random-access memory cells is provided. Each memory cell may include inverting circuits formed from pull-up...
US-1,020,4905 Semiconductor structure and manufacturing method thereof
A semiconductor structure includes a substrate, a first gate structure, and a second gate structure. The substrate has a plurality of first fins and a plurality...
US-1,020,4904 Methods, apparatus and system for vertical finFET device with reduced parasitic capacitance
A method, apparatus and system are disclosed herein for a finFET device having an air gap spacer and/or a tapered bottom dielectric spacer for reducing...
US-1,020,4903 Tunneling field effect transistor
Devices and methods for forming a device are disclosed. A substrate is provided. A plurality of fin structures are formed in the substrate. The fin structures...
US-1,020,4902 Semiconductor device and method of manufacturing the same
A semiconductor device includes a first active structure on a substrate including a first epitaxial pattern, a second epitaxial pattern and a first channel...
US-1,020,4901 Semiconductor devices including resistors
A semiconductor device is provided including a resistor structure on a semiconductor substrate. The resistor structure includes pad portions and a resistor body...
US-1,020,4900 Semiconductor device
A semiconductor device includes a first circuit configured to generate a current corresponding to the input signal, a second circuit configured to generate a...
US-1,020,4899 Semiconductor device with first and second chips and connections thereof and a manufacturing method of the same
In a non-insulated DC-DC converter having a circuit in which a power MOS FET high-side switch and a power MOS FET low-side switch are connected in series, the...
US-1,020,4898 Semiconductor device and electronic device
A semiconductor device in which a circuit and a power storage element are efficiently placed is provided. The semiconductor device includes a first transistor,...
US-1,020,4897 Electrostatic discharge protection semiconductor device
An ESD protection semiconductor device includes a substrate, a gate set formed on the substrate, a source region and a drain region formed in the substrate...
US-1,020,4896 Vertical double diffusion metal-oxide-semiconductor power device
A vertical double diffusion metal-oxide-semiconductor power device with thermal sensitivity unit includes a vertical double diffusion metal-oxide-semiconductor...
US-1,020,4895 Integrated circuit having spare circuit cells
Aspects of the disclosure include an integrated circuit that includes a plurality of functional circuit cells and a plurality of inactive spare functional...
US-1,020,4894 Via placement within an integrated circuit
An integrated circuit layout includes a routing layout of routing conductors and routing connection vias formed prior to a power grid connection which forms...
US-1,020,4893 Stacked dies and methods for forming bonded structures
In various embodiments, a method for forming a bonded structure is disclosed. The method can comprise mounting a first integrated device die to a carrier. After...
US-1,020,4892 Semiconductor package
A semiconductor package may be composed of a variety of different types of semiconductor chips of different sizes and support structures stacked within the...
US-1,020,4891 Semiconductor module
According to one embodiment, a semiconductor module includes a first semiconductor element, a second semiconductor element, a first light emitting element and a...
US-1,020,4890 Substrate for system in package (SIP) devices
Methods, systems, and devices for enabling the use of a special, generic, or standard substrate for similar system SIP assemblies are disclosed. The required...
US-1,020,4889 Package structure and method of forming thereof
A package structure includes a semiconductor device, a first dielectric layer, a redistribution line and a conductive bump. The first dielectric layer is over...
US-1,020,4888 LED-based light sources for light emitting devices and lighting arrangements with photoluminescence wavelength...
An LED-based light source for generating light having a selected dominant wavelength .lamda..sub.ds comprises a package housing a plurality of LEDs consisting...
US-1,020,4887 Reflective solder mask layer for LED phosphor package
A mounting substrate (40) has a patterned metal layer defining a plurality of top metal bond pads for bonding to bottom metal bond pads of LED dies. A solder...
US-1,020,4886 Semiconductor device
A semiconductor device includes semiconductor chips fixed to a board, an insulating plate having a through-hole formed therein, a first lower conductor...
US-1,020,4885 Semiconductor package including stacked semiconductor chips electrically connected to redistribution layers
A semiconductor package may include a first redistribution layer (RDL); a first semiconductor chip on a top surface of the first RDL, the first semiconductor...
US-1,020,4884 Multichip packaging for dice of different sizes
Apparatuses, methods and storage medium associated with integrated packaging for a stack of semiconductor dice of different sizes are disclosed herein. In...
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