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Patent # Description
US-1,027,6741 Method for eliminating metal composites from polycrystalline silicon cell piece
A method for eliminating metal composites from a polycrystalline silicon cell piece, comprising the steps of: injecting current into the polycrystalline silicon...
US-1,027,6740 Co-deposition of black silicon
A method for forming a photon absorbing layer. A substrate having a target surface is introduced into a controllable environment, and the pressure within the...
US-1,027,6739 High voltage photovoltaics integrated with light emitting diode
An electrical device that includes a material stack present on a supporting substrate. An LED is present in a first end of the material stack having a first set...
US-1,027,6738 Photovoltaic cell, including a crystalline silicon oxide passivation thin film, and method for producing same
A heterojunction photovoltaic cell includes at least one crystalline silicon oxide film directly placed onto one of the front or rear faces of a crystalline...
US-1,027,6737 Solar cell and solar cell module
A solar cell and a solar cell module are disclosed. The solar cell includes a semiconductor substrate containing a crystalline silicon material, a first...
US-1,027,6736 Flexible solar array
A flexible solar array for a spacecraft or aviation craft including a flexible backing substrate with conductive trace(s) formed thereon; solar cell...
US-1,027,6735 Semiconductor nanocrystals
A semiconductor nanocrystal include a first I-III-VI semiconductor material and have a luminescence quantum yield of at least 10%, at least 20%, or at least...
US-1,027,6734 Plasmonic component and plasmonic photodetector and method for producing same
The present invention relates to plasmonic components, more particularly plasmonic waveguides, and to plasmonic photodetectors that can be used in the field of...
US-1,027,6733 Solar cell and solar cell module
The solar cell (10) of the present invention comprises: a first electrode (21) including a plurality of finger portions (21a), and a busbar portion (21b)...
US-1,027,6732 Solar cell element and method of manufacturing solar cell element
A solar cell element includes a semiconductor substrate, a passivation layer and a protective layer. The semiconductor substrate includes a p-type semiconductor...
US-1,027,6731 Schottky barrier diode
A Schottky barrier diode comprises a semiconductor layer configured to include a surface and a plurality of recesses that are recessed relative to the surface;...
US-1,027,6730 Stacked Schottky diode
A stacked Schottky-diode having a stack with a top side and a bottom side. The stack has at least three semiconductor layers, and a first connection contact...
US-1,027,6729 Wide bandgap semiconductor switching device with wide area Schottky junction, and manufacturing process thereof
A switching device including: a body of semiconductor material, which has a first conductivity type and is delimited by a front surface; a contact layer of a...
US-1,027,6728 Semiconductor device including non-volatile memory cells
A semiconductor device includes a non-volatile memory (NVM) cell. The NVM cell includes a semiconductor wire disposed over an insulating layer disposed on a...
US-1,027,6727 Memory cell, semiconductor integrated circuit device, and method for manufacturing semiconductor integrated...
A semiconductor integrated circuit device includes first and second select gate electrodes that are sidewall-shaped along sidewalls of a memory gate structure....
US-1,027,6726 Non-volatile memory cell and non-volatile memory
An non-volatile memory cell is described. The non-volatile memory cell includes a substrate, insulators, a floating gate and a control gate. The substrate has a...
US-1,027,6725 Gate structure
A method of forming a channel of a gate structure is provided. A first epitaxial channel layer is formed within a first trench of the gate structure. A dry...
US-1,027,6724 Semiconductor device
A transistor with favorable electrical characteristics is provided. One embodiment of the present invention is a semiconductor device including a semiconductor,...
US-1,027,6723 Flexible display
A flexible display is disclosed. The flexible display including an oxide semiconductor thin film transistor on a plastic substrate includes a first buffer layer...
US-1,027,6722 Thin film transistor
A thin film transistor includes an oxide semiconductor layer including a channel region, and a source region and a drain region having a resistivity lower than...
US-1,027,6721 Liquid crystal display
A liquid crystal display includes a first gate line, a first data line, and a first pixel. The first pixel includes: a first subpixel including a first thin...
US-1,027,6720 Method for forming fin field effect transistor (FINFET) device structure
A FinFET device structure and method for forming the same are provided. The method includes forming a plurality of fin structures over a substrate, and the...
US-1,027,6719 Method of manufacturing a semiconductor device and a semiconductor device
In a method of manufacturing a semiconductor device, an opening is formed in an interlayer dielectric layer such that a source/drain region is exposed in the...
US-1,027,6718 FinFET having a relaxation prevention anchor
A method and structure for mitigating strain loss (e.g., in a FinFET channel) includes providing a semiconductor device having a substrate having a substrate...
US-1,027,6717 Channel strain inducing architecture and doping technique at replacement poly gate (RPG) stage
The demand for increased performance and shrinking geometry from ICs has brought the introduction of multi-gate devices including finFET devices. Inducing a...
US-1,027,6716 Transistor with asymmetric source and drain regions
Semiconductor structures and methods for forming a semiconductor structure are provided. An active semiconductor region is disposed in a substrate. A gate is...
US-1,027,6715 Fin field effect transistor and method for fabricating the same
A fin field effect transistor (FinFET) is provided. The FinFET includes a substrate, a gate stack, and strained source and drain regions. The substrate has a...
US-1,027,6714 Twin gate field effect diode
A semiconductor diode including a first conductivity type region on an upper surface of a semiconductor substrate, a fin structure atop the first conductivity...
US-1,027,6713 Semiconductor component and method of manufacture
In accordance with an embodiment, a semiconductor component includes a plurality of layers of compound semiconductor material over a body of semiconductor...
US-1,027,6712 III-nitride field-effect transistor with dual gates
A field effect transistor (FET) includes a III-nitride channel layer, a III-nitride barrier layer on the channel layer, a first dielectric on the barrier layer,...
US-1,027,6711 Semiconductor device and method of manufacturing the same
Provided is a semiconductor device including an active region provided in a first conductivity type semiconductor layer and a termination region provided around...
US-1,027,6710 High voltage transistor and fabrication method thereof
A high voltage transistor including a substrate is provided, and the substrate has an indent region. A doped region is disposed in the substrate at both sides...
US-1,027,6709 Semiconductor device and method of manufacturing semiconductor device
A MOS gate having a trench gate structure is formed on the front surface side of a silicon carbide substrate. A gate trench of the trench gate structure goes...
US-1,027,6708 Reverse-blocking IGBT having a reverse-blocking edge termination structure
A reverse-blocking IGBT (insulated gate bipolar transistor) includes a plurality of IGBT cells disposed in a device region of a semiconductor substrate, a...
US-1,027,6707 Switching element having inclined body layer surfaces
A switching element includes a semiconductor substrate that includes a first n-type semiconductor layer, a p-type body layer constituted by an epitaxial layer,...
US-1,027,6706 Gated diode in a press-fit housing and an alternator assembly having a gated diode arranged in a load path
A gated diode in a press-fit housing includes a base configured to be press-fit into an opening of a diode carrier plate and including a pedestal portion with a...
US-1,027,6705 Group III--nitride double-heterojunction field effect transistor
A semiconductor structure having a buffer layer, a pseudomorphic, impurity doped, back-barrier layer disposed on the buffer layer, a channel layer disposed on...
US-1,027,6704 High electron mobility transistor with negative capacitor gate
A high electron mobility transistor includes a semiconductor structure having a channel layer and a cap layer forming a two dimensional electron gas (2-DEG)...
US-1,027,6703 Compound semiconductor device and method of manufacturing the same
A compound semiconductor device includes: a carrier transit layer; a carrier supply layer over the carrier transit layer; a source electrode and a drain...
US-1,027,6702 Semiconductor device
The performance of a semiconductor device is improved. An emitter electrode is coupled to a P-type body region and an N.sup.+-type emitter region of a linear...
US-1,027,6701 Compound semiconductor device
A compound semiconductor device includes a heterojunction bipolar transistor and a bump. The heterojunction bipolar transistor includes a plurality of unit...
US-1,027,6700 Symmetrical lateral bipolar junction transistor and use of same in characterizing and protecting transistors
A symmetrical lateral bipolar junction transistor (SLBJT) is provided. The SLBJT includes a p-type semiconductor substrate, a n-type well, an emitter of a SLBJT...
US-1,027,6699 Energy-filtered cold electron devices and methods
Energy-filtered cold electron devices use electron energy filtering through discrete energy levels of quantum wells or quantum dots that are formed through band...
US-1,027,6698 Scalable process for the formation of self aligned, planar electrodes for devices employing one or two...
A method of forming an electrical device that includes forming a gate dielectric layer over a gate electrode, forming source and drain electrodes on opposing...
US-1,027,6697 Negative capacitance FET with improved reliability performance
A negative capacitance device includes a semiconductor layer. An interfacial layer is disposed over the semiconductor layer. An amorphous dielectric layer is...
US-1,027,6696 Method of making split gate non-volatile flash memory cell
A method of forming a non-volatile memory cell on a substrate having memory cell and logic circuit regions by forming a pair of conductive floating gates in the...
US-1,027,6695 Self-aligned inner-spacer replacement process using implantation
A method for manufacturing a semiconductor device includes forming a stacked configuration of first and second semiconductor layers on a semiconductor...
US-1,027,6694 Semiconductor device and method of fabricating the same
A semiconductor device includes a semiconductor substrate comprising a group III element and a group V element, and a gate structure on the semiconductor...
US-1,027,6693 Semiconductor device and manufacturing method thereof
A semiconductor device includes a substrate, a bottom semiconductor fin, at least one sidewall structure, a top semiconductor fin, and a gate structure. The...
US-1,027,6692 Fin diode structure and methods thereof
A method and structure for forming a fin bottom diode includes providing a substrate having a plurality of fins extending therefrom. Each of the plurality of...
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