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Patent # Description
US-1,027,6691 Conformal transfer doping method for fin-like field effect transistor
Doping techniques for fin-like field effect transistors (FinFETs) are disclosed herein. An exemplary method includes forming a fin structure, forming a doped...
US-1,027,6690 Semiconductor device and method
A method includes forming a dummy gate structure over a semiconductor fin, forming a dielectric layer on opposing sides of the dummy gate structure, and...
US-1,027,6689 Method of forming a vertical field effect transistor (VFET) and a VFET structure
Disclosed are embodiments of an improved method for forming a vertical field effect transistor (VFET). In each of the embodiments of the method, a semiconductor...
US-1,027,6688 Selective process for source and drain formation
A device comprising Si:As source and drain extensions and Si:As or Si:P source and drain features formed using selective epitaxial growth and a method of...
US-1,027,6687 Formation of self-aligned bottom spacer for vertical transistors
A method of fabricating a semiconductor device includes forming a fin on a substrate. Source/drain regions are arranged on the substrate on opposing sides of...
US-1,027,6686 Cascode configured semiconductor component
In accordance with an embodiment, a cascode connected semiconductor component and a method for manufacturing the cascode connected semiconductor component are...
US-1,027,6685 Heterojunction tunnel field effect transistor fabrication using limited lithography steps
A structure and method for fabricating a vertical heterojunction tunnel field effect transistor (TFET) using limited lithography steps is disclosed. The...
US-1,027,6684 Conductive spline for metal gates
An integrated circuit may include a metal gate which extends over an active area and onto an isolation dielectric layer. A conductive spline is formed on the...
US-1,027,6683 Common metal contact regions having different Schottky barrier heights and methods of manufacturing same
Methods for forming a semiconductor device having dual Schottky barrier heights using a single metal and the resulting device are provided. Embodiments include...
US-1,027,6682 High electron mobility transistor
A high electron mobility transistor (HEMT) includes a first III-V compound layer. A second III-V compound layer is disposed on the first III-V compound layer...
US-1,027,6681 Double gate transistor device and method of operating
In accordance with an embodiment, a method include switching on a transistor device by generating a first conducting channel in a body region by driving a first...
US-1,027,6680 Gate feature in FinFET device
A semiconductor device includes a fin structure, disposed on a substrate, that horizontally extends along a direction; and a gate feature comprising a gate...
US-1,027,6679 Semiconductor device and method for manufacturing the same
A semiconductor device including a substrate, a first doped region, a second doped region, a gate, and a gate dielectric layer is provided. The substrate has a...
US-1,027,6678 Semiconductor device and fabrication method thereof
A semiconductor device and a fabrication method thereof are provided. The semiconductor device includes a semiconductor structure, a dielectric layer, a...
US-1,027,6676 Methods of forming metal gate isolation
A method of forming high-k metal gates (HKMGs) includes removing a dummy gate structure formed over a first fin and a second fin to form a trench that exposes...
US-1,027,6675 Integrated circuit device and method of manufacturing the same
An integrated circuit device includes a source/drain region having a recess in its top, a contact plug extending on the source/drain region from within the...
US-1,027,6674 Method of forming a gate contact structure and source/drain contact structure for a semiconductor device
One illustrative method disclosed includes, among other things, forming a sacrificial S/D contact structure above an S/D region of a transistor device, removing...
US-1,027,6673 Semiconductor die having stacking structure of silicon-metallic conductive layer-silicon
The description relates to a semiconductor die having a stacking structure of silicon-metallic conductive layer-silicon, and the semiconductor die according to...
US-1,027,6672 Vertical semiconductor device having a trench gate a base contact region
A semiconductor device includes: a drain region formed on a rear surface side of a substrate; a base layer formed between the drain region and a front surface...
US-1,027,6671 Semiconductor device, method for manufacturing semiconductor device, and electronic device
A semiconductor device includes a compound semiconductor layer, a gate electrode, and first and second insulating layers. The first insulating layer covers the...
US-1,027,6670 Semiconductor devices and methods for forming semiconductor devices
A semiconductor device includes an array of needle-shaped trenches extending into a semiconductor substrate. The semiconductor device further includes a gate...
US-1,027,6669 Sloped field plate and contact structures for semiconductor devices and methods of manufacturing thereof
A semiconductor device includes a base layer, a dielectric layer over the base layer, an opening extending through the dielectric layer and to a main surface of...
US-1,027,6668 Lower cylinderical electrodes forming a honey comb structure with plurality support structures
A semiconductor device including a plurality of lower electrodes on a substrate, the plurality of lower electrodes in a first direction and a second direction...
US-1,027,6667 High voltage breakdown tapered vertical conduction junction transistor
A vertical conduction junction transistor apparatus includes a multilayered semiconductor unit cell that has a substrate, epitaxial drift layer, epitaxial...
US-1,027,6666 Semiconductor device
On a front surface of an n.sup.+-type SiC substrate becoming a drain region, an n.sup.--type drift layer, a p-type base layer, and an n.sup.+-type source layer...
US-1,027,6665 Semiconductor device and method of manufacturing the same
A semiconductor device is provided. The semiconductor device includes a n- type layer disposed at a first surface of a n+ type silicon carbide substrate and a...
US-1,027,6664 Semiconductor structures and methods for multi-dimension of nanowire diameter to improve drive current
A semiconductor device having a channel formed from a nanowire with a multi-dimensional diameter is provided. The semiconductor device comprises a drain region...
US-1,027,6663 Tunneling transistor and method of fabricating the same
A tunneling transistor and a method of fabricating the same, the tunneling transistor includes a fin shaped structure, a source structure and a drain structure,...
US-1,027,6662 Method of forming contact trench
A method of fabricating a semiconductor device is disclosed. The method includes forming a first gate stack and a second gate stack over a substrate. Each of...
US-1,027,6661 Semiconductor device
A semiconductor device includes: a channel-forming region of a first conductivity type; a first main electrode region of a second conductivity type disposed in...
US-1,027,6660 Nanowire field effect transistor having a metal gate surrounding semiconductor nanowire
A device includes a substrate, a buffer layer, a nanowire, a gate structure, and a remnant of a sacrificial layer. The buffer layer is above the substrate. The...
US-1,027,6659 Air gap adjacent a bottom source/drain region of vertical transistor device
A vertical transistor device includes a vertically-oriented channel semiconductor (VOCS) structure positioned above a substrate and a first bottom spacer...
US-1,027,6658 FinFET devices
FinFET devices and processes to prevent fin or gate collapse (e.g., flopover) in finFET devices are provided. The method includes forming a first set of...
US-1,027,6657 Isolation structure for active devices
An isolation structure for active devices is provided. In some embodiments, the isolation structure is used in a transistor. The transistore includes a...
US-1,027,6656 Method of manufacturing semiconductor devices by using epitaxy and semiconductor devices with a lateral structure
Epitaxy troughs are formed in a semiconductor substrate, wherein a matrix section of the semiconductor substrate laterally separates the epitaxy troughs and...
US-1,027,6655 Semiconductor devices and methods for forming a semiconductor device
A semiconductor device includes a plurality of compensation regions of a first conductivity type arranged in a semiconductor substrate. The semiconductor device...
US-1,027,6654 Semiconductor device with parallel PN structures
A semiconductor device including a substrate, an active portion and a well region both formed in the substrate on a first surface side thereof, and a...
US-1,027,6653 Semiconductor device and method of manufacturing semiconductor device
In a first main surface of a silicon carbide semiconductor base, a trench is formed. On a first main surface side of the silicon carbide semiconductor base, an...
US-1,027,6652 Schottky diode
A schottky diode includes a schottky junction, an ohmic junction, a first isolation structure and a plurality of doped regions. The schottky junction includes a...
US-1,027,6651 Low warpage high density trench capacitor
A capacitor structure and method of forming the capacitor structure is provided, including a providing a doped region of a substrate having a two-dimensional...
US-1,027,6650 Semiconductor memory device and manufacturing method thereof
A semiconductor memory device includes a semiconductor substrate, a first support layer, a first electrode, a capacitor dielectric layer, and a second...
US-1,027,6649 Metal resistors having nitridized dielectric surface layers and nitridized metal surface layers
A semiconductor structure containing at least two metal resistor structures having different resistivities is provided and includes a first metal resistor...
US-1,027,6648 Plasma treatment for thin film resistors on integrated circuits
A method of fabricating ICs including thin film resistors (TFRs) depositing a dielectric liner layer on a substrate including a semiconductor surface having a...
US-1,027,6647 Display device
A display device according to an embodiment of the present invention includes: a display panel including a display region, a backside region, and a curvature...
US-1,027,6646 Display device
A display is provided. The display device includes a display area and a non-display area located around the display area; a base layer; an organic...
US-1,027,6645 Image display device and method for repairing short circuit failure
The present invention relates to an image display device and a method for repairing a short circuit failure. The present invention is applicable to, for...
US-1,027,6644 Organic light emitting diode display and manufacturing method thereof
An organic light emitting diode display comprises a substrate including a display area in which a pixel is disposed and a peripheral area surrounding the...
US-1,027,6643 Organic light emitting display device and method of manufacturing the same
Disclosed are an organic light emitting display device which may implement high resolution and a method of manufacturing the same. A storage capacitor disposed...
US-1,027,6642 Top-emitting OLED display unit, method for manufacturing the same, and display panel
Disclosed are a top-emitting OLED display unit, a method for manufacturing the same, and a display panel. The top-emitting OLED display unit includes a first...
US-1,027,6641 Display panel and display device
The disclosure discloses a display panel and a display device. Since at least a part of the transparent areas includes the transparent auxiliary electrode...
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