Easy To Use Patents Search & Patent Lawyer Directory

At Patents you can conduct a Patent Search, File a Patent Application, find a Patent Attorney, or search available technology through our Patent Exchange. Patents are available using simple keyword or date criteria. If you are looking to hire a patent attorney, you've come to the right place. Protect your idea and hire a patent lawyer.

Searching:





Search by keyword, patent number, inventor, assignee, city or state:




Patent # Description
US-1,029,0584 Conductive vias in semiconductor packages and methods of forming same
An embodiment package includes a first integrated circuit die encapsulated in a first encapsulant; a first through via extending through the first encapsulant;...
US-1,029,0583 Semiconductor device
An object of the present invention is to shorten the switching delay time of a semiconductor device. Transistor units are provided between a source bus line and...
US-1,029,0582 Method, apparatus, and system for offset metal power rail for cell design
At least one method, apparatus and system disclosed involves circuit layout for an integrated circuit device comprising an asymmetrically placed metal...
US-1,029,0581 Methods of forming conductive structures including stair step or tiered structures having conductive portions
Conductive structures include stair step structures positioned along a length of the conductive structure and at least one landing comprising at least one via...
US-1,029,0580 Hybrid copper structure for advance interconnect usage
The present disclosure, in some embodiments, relates to an integrated chip having a back-end-of-the-line interconnect stack. The integrated chip has a...
US-1,029,0579 Utilization of backside silicidation to form dual side contacted capacitor
An integrated circuit structure may include a capacitor having a semiconductor layer as a first plate and a gate layer as a second plate. A capacitor dielectric...
US-1,029,0577 Semiconductor device
A SOP has a semiconductor chip. The chip includes a pair of a lower layer coil and an upper layer coil laminated through an interlayer insulating film formed...
US-1,029,0576 Stress reduction apparatus with an inverted cup-shaped layer
A device comprises a metal via having a lower portion in a first etch stop layer and an upper portion in a first dielectric layer over a substrate, a second...
US-1,029,0575 Memory devices, semiconductor devices and related methods
Conductive structures include a plurality of conductive steps and a contact extending at least partially therethrough in communication with at least one of the...
US-1,029,0574 Embedded metal-insulator-metal (MIM) decoupling capacitor in monolitic three-dimensional (3D) integrated...
Various embodiments include three-dimensional (3D) integrated circuit (IC) structures and methods of forming such structures. In some cases, a 3D IC structure...
US-1,029,0573 Semiconductor device and electronic device
A semiconductor device with low power consumption is provided. The semiconductor device can serve as a current output DA converter. The semiconductor device...
US-1,029,0572 Trace/via hybrid structure and method of manufacture
A method of forming an interconnect that includes providing a sacrificial trace structure using an additive forming method. The sacrificial trace structure...
US-1,029,0571 Packages with si-substrate-free interposer and method forming same
A method includes forming a plurality of dielectric layers, forming a plurality of redistribution lines in the plurality of dielectric layers, forming stacked...
US-1,029,0570 Wiring substrate
A wiring substrate includes a first substrate and a second substrate stacked on the first substrate. The first substrate includes a first adhesive layer and...
US-1,029,0569 Constrained cure component attach process for improved IC package warpage control
An apparatus, comprising a first platform comprising a first working surface having a first non-planar portion; and a second platform comprising a second...
US-1,029,0568 Power module for an electric motor
A power module for an electric motor has at least one semiconductor switch half bridge with a high-side semiconductor switch and a low-side semiconductor...
US-1,029,0567 Transistor package with three-terminal clip
A package which comprises an electrically conductive chip carrier, a first chip comprising a first connection terminal, a second connection terminal located on...
US-1,029,0566 Electronic component
In an embodiment, an electronic component includes a high-voltage depletion mode transistor including a current path coupled in series with a current path of a...
US-1,029,0565 Semiconductor device and method for manufacturing semiconductor device
A method includes the steps of: preparing a lead frame including a plurality of die pads, and preparing a plurality of semiconductor chips; disposing each of...
US-1,029,0564 Systems and methods for lead frame locking design features
Systems and methods for lead frame locking design features are provided. In one embodiment, a method comprises: fabricating a lead frame for a chip package, the...
US-1,029,0563 Semiconductor device including die pad with projections
The specification discloses a technique for preventing a bonding material from reaching the upper and lower surfaces of a semiconductor chip in bonding the...
US-1,029,0562 Apparatus and method for reducing acoustical noise in synthetic jets
Apparatus and method are provided for reducing acoustical noise when cooling a device, such as a lamp system. The apparatus includes at least a set of a first...
US-1,029,0561 Thermal interfaces for integrated circuit packages
A thermal interface may include a wired network made of a first TIM, and a second TIM surrounding the wired network. A heat spreader lid may include a wired...
US-1,029,0560 Semiconductor device
A semiconductor device according to the present disclosure includes an electrically conductive first electrode block, an electrically conductive submount, an...
US-1,029,0559 Thermal dissipation through seal rings in 3DIC structure
A die includes a semiconductor substrate, a through-via penetrating through the semiconductor substrate, a seal ring overlying and connected to the through-via,...
US-1,029,0558 Transparent siloxane encapsulant and adhesive
An adhesive or encapsulant composition, having a siloxane polymer having a molecular weight of from 300 to 150,000 g/mol and having a viscosity of from 1000 to...
US-1,029,0557 Selective metallization of an integrated circuit (IC) substrate
Embodiments of the present disclosure describe selective metallization of an integrated circuit (IC) substrate. In one embodiment, an integrated circuit (IC)...
US-1,029,0556 High reliability wafer level semiconductor packaging
Implementations of semiconductor packages may include: a semiconductor wafer, a glass lid fixedly coupled to a first side of the semiconductor die by an...
US-1,029,0555 Semiconductor device including sensor and driving terminals spaced away from the semiconductor device case wall
A semiconductor device comprises a power device, a sensor which measures a physical state of the power device to transmit a signal according to the physical...
US-1,029,0554 Current sensor and method of making a current sensor
A current sensor comprises a current conductor having a first portion, a measuring portion and a second portion, the first portion including one or more first...
US-1,029,0553 System and method of determining process completion of post heat treatment of a dry etch process
Provided is a method for determining and utilizing process completion of post heat treatment (PHT) of a dry etch process, the method comprising: providing a...
US-1,029,0552 Methods for processing a semiconductor wafer using non-contact electrical measurements indicative of at least...
A method for processing a semiconductor wafer uses non-contact electrical measurements indicative of at least one tip-to-tip short or leakage, at least one...
US-1,029,0551 Overlay mark and method for evaluating stability of semiconductor manufacturing process
The present invention provides an overlay mark, including a substrate and plural sets of first pattern block and second pattern block. A first direction and a...
US-1,029,0550 Strain enhancement for FinFETs
An integrated circuit device includes a substrate having a first portion in a first device region and a second portion in a second device region. A first...
US-1,029,0549 Integrated circuit structure, gate all-around integrated circuit structure and methods of forming same
The disclosure is directed to gate all-around integrated circuit structures, finFETs having a dielectric isolation, and methods of forming the same. The gate...
US-1,029,0548 Semiconductor device structure with semiconductor wire
Semiconductor device structures are provided. The semiconductor device structure includes a first semiconductor wire over a semiconductor substrate. The first...
US-1,029,0547 Method of manufacturing a semiconductor device with metal gate etch selectivity control
A method of manufacturing a semiconductor device includes forming a first layer of a conductive material in gate spaces created by removing portions of a dummy...
US-1,029,0546 Threshold voltage adjustment for a gate-all-around semiconductor structure
A semiconductor structure includes a plurality of first semiconductor layers interleaved with a plurality of second semiconductor layers. The first and second...
US-1,029,0545 Laser processing method
Laser light is converged at an object including a semiconductor substrate formed with a plurality of functional devices on a front surface, from a back surface...
US-1,029,0544 Methods of forming conductive contact structures to semiconductor devices and the resulting structures
One illustrative method disclosed herein may include forming a contact etching structure in a layer of insulating material positioned above first and second...
US-1,029,0543 Method for manufacturing semiconductor device
A method for manufacturing semiconductor device is provided. A substrate having a memory region and a capacitance region is provided. A plurality of word line...
US-1,029,0542 Method of manufacturing semiconductor device
Described herein is a technique capable of forming a film having excellent step coverage and superior filling properties. According to the technique, there is...
US-1,029,0541 Barrier layers in trenches and vias
A semiconductor structure includes a dielectric layer having a trench formed therein and a barrier layer formed on a bottom and sidewalls of the trench, and on...
US-1,029,0540 Disubstituted alkyne dicobalt hexacarbonyl compounds, method of making and method of use thereof
Described herein are cobalt compounds, processes for making cobalt compounds, cobalt compounds used as precursors for depositing cobalt-containing films (e.g.,...
US-1,029,0539 Semiconductor interconnect structure and manufacturing method thereof
A semiconductor interconnect structure and its manufacturing method are presented. The manufacturing method includes: providing a substrate structure, wherein...
US-1,029,0538 Interconnect structure and method of forming the same
An interconnect structure and a method of forming an interconnect structure are disclosed. The interconnect structure includes a lower etch stop layer (ESL); an...
US-1,029,0537 Method of manufacturing semiconductor device
A method of manufacturing a semiconductor device includes forming a first conductive structure on a substrate, forming an insulation layer on a sidewall of the...
US-1,029,0536 Structure and method for interconnection
Various self-aligned interconnect structures are disclosed herein. An exemplary interconnect structure includes a first dielectric layer disposed over a...
US-1,029,0535 Integrated circuit fabrication with a passivation agent
Examples of fabricating an integrated circuit device are disclosed herein. In an embodiment, an integrated circuit workpiece is received that includes a...
US-1,029,0534 Methods of sealing openings, and methods of forming integrated assemblies
Some embodiments include a method of forming an integrated assembly. A construction is formed to include a structure having an exposed surface, and to include...
← Previous | 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 | Next →

File A Patent Application

  • Protect your idea -- Don't let someone else file first. Learn more.

  • 3 Easy Steps -- Complete Form, application Review, and File. See our process.

  • Attorney Review -- Have your application reviewed by a Patent Attorney. See what's included.