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Searching: computer memory





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Patent # Description
US-8,666,159 Real time feature extraction
A computer-implemented method for method for detecting features in an image, comprising, receiving a first image at a GPU, wherein the GPU comprises a plurality...
US-8,666,114 System and method for geospatial partitioning of a geographical region
An apparatus includes at least one memory unit and at least one processing unit. The memory unit is configured to receive and store information associated with...
US-8,665,955 Method of storing pictures in a memory using compression coding and cost function including power consumption
The present invention relates to a method of storing pictures in a memory, a picture being divided into data blocks, said method comprising the step of:...
US-8,665,598 Planar information device
An substantially planar information device is provided comprising: a memory module including a memory device and an electrical interface to connect the memory...
US-8,661,540 Method and apparatus for secure credential entry without physical entry
A method and apparatus are disclosed wherein a portable memory storage device is provided for interfacing with a communications port of the computer system....
US-8,661,513 Selection and application of roles and systems based on username and layout ID
In one embodiment a computing system comprises one or more processors, a display device coupled to the computing system, and a memory module communicatively...
US-8,661,422 Methods and apparatus for local memory compaction
Methods, apparatus and computer software product for local memory compaction are provided. In an exemplary embodiment, a processor in connection with a memory...
US-8,661,354 Methods, apparatuses and computer program products for using near field communication to implement games and...
An apparatus for using Near Field Communication to facilitate implementation of an electronic game or application may include a processor and memory storing...
US-8,661,321 Parallel processing error detection and location circuitry for configuration random-access memory
Error detection and error location determination circuitry is provided for detecting and locating soft errors in random-access-memory arrays on programmable...
US-8,661,318 Memory management in a non-volatile solid state memory device
A computer-implemented method of managing a memory of a non-volatile solid state memory device by balancing write/erase cycles among blocks to level block...
US-8,661,306 Baseboard management controller and memory error detection method of computing device utilized thereby
A method detects a memory error of a computing device using a baseboard management controller (BMC) of the computing device. The BMC includes a microprocessor...
US-8,661,239 Encryption device and method for controlling download and access operations performed to a mobile terminal
An encryption device and method for controlling download and access operations performed to a mobile terminal are disclosed. A switch circuit (102) is disposed...
US-8,661,237 System and method for booting a plurality of servers from a shared boot image stored on a USB boot image sharer
A computer system and an operation system loading method thereof are provided. The computer system comprises a universal serial bus (USB) storage device storing...
US-8,661,236 Partial initialization of divided programs in response to pre-boot and post-boot activation events to rapidly...
A method for booting up a computer is disclosed. Initially, a memory image of a boot program is stored in a main memory of a computer. The memory image includes...
US-8,661,211 Method for migrating contents of a memory on a virtual machine
A method for migrating contents of a memory on a virtual machine. The method includes computer instructions for establishing communication from a source virtual...
US-8,661,206 Hybrid hardware and software implementation of transactional memory access
Embodiments of the invention relate a hybrid hardware and software implementation of transactional memory accesses in a computer system. A processor including a...
US-8,661,187 System, method, and computer program product for skewing expected wearout times of memory devices
A method in one embodiment includes writing first data to a first memory device of a memory array at a first number of writes per unit time; writing second data...
US-8,661,183 Computer system, data storage method, and program for reduction of stored data after hibernation
In a computer system that can configure a virtual machine being able to transit to a hibernation state, data of a main memory of the virtual machine stored in...
US-8,661,127 Information processing apparatus, information processing method, non-transitory computer readable medium...
An information processing apparatus includes a memory storing an allowance list, a first receiving unit that receives a first request from a client apparatus, a...
US-8,661,009 Dynamic real-time reports based on social networks
A system for analyzing social networks includes a memory storing a social network data structure, a correlation engine, a trigger function module, and a...
US-8,660,865 System and method for processing data related to life insurance policies issued prior to underwriting
A computer system for administering applications for life insurance has a processor and a memory storage device in communication with the processor. The...
US-8,660,296 Systems and methods for facilitating video fingerprinting using local descriptors
Systems and methods for facilitating video fingerprinting are provided. In one embodiment, a system can include: a memory, a microprocessor, a communication...
US-8,659,775 Print shop management method for customizing print-on-demand driver
A method implemented in a print shop management system that includes a data processing apparatus having a non-transitory memory for storing a computer software...
US-8,659,665 Electronic apparatus
An electronic system comprising an image pickup unit 1, a computer 2, and communication terminals for connecting the unit and the computer, such as infrared...
US-8,659,598 Adjusting navigable areas of a virtual scene
A system includes a computing device that includes a memory configured to store instructions. The computing device also includes a processor configured to...
US-8,659,453 Digital radio frequency memory utilizing time interleaved analog to digital converters and time interleaved...
A digital radio frequency memory (DRFM) comprises a plurality of time interleaved analog to digital converters (ADCs) in cooperation with a plurality of time...
US-8,658,997 Bipolar multistate nonvolatile memory
Embodiments generally include a method of forming a nonvolatile memory device that contains a resistive switching memory element that has an improved device...
US-8,656,628 System, method and computer program product for aiming target
Disclosed is a system for a weapon sight for aiming a target. The system includes a controller unit configured to initiate an electronic zoom calibration mode,...
US-8,656,492 Systems, methods, and apparatus for network intrusion detection
Systems, methods, and apparatus for network intrusion detection are provided. A device configured to facilitate network intrusion detection may include at least...
US-8,656,490 Safe and secure access to dynamic domain name systems
A method and apparatus for safe and secure access to dynamic domain name systems. In one embodiment a method comprises transmitting a DNS query to a dynamic DNS...
US-8,656,397 Migrating groups of threads across NUMA nodes based on remote page access frequency
A mechanism for tracking memory accesses in a non-uniform memory access (NUMA) system to optimize processor task placement is disclosed. A method of embodiments...
US-8,656,373 Distributed graphical program execution using a handheld computer
A system and method for deploying one or more graphical programs on a personal digital assistant (PDA). One or more selected graphical programs may be...
US-8,656,355 Application-based specialization for computing nodes within a distributed processing system
A distributed processing system is described that employs "application-based" specialization. In particular, the distributed processing system is constructed as...
US-8,656,345 Managing hardware implementation and deployment of a graphical program
System and method for managing and specifying hardware implementation of a graphical program. A graphical program that implements an algorithm is stored in a...
US-8,656,232 Apparatus and method for testing semiconductor integrated circuits, and a non-transitory computer-readable...
An apparatus for testing a semiconductor integrated circuit includes a pattern data generating unit configured to generate test pattern data for testing a write...
US-8,656,228 Memory error isolation and recovery in a multiprocessor computer system
A system and computer implemented method for isolating errors in a computer system is provided. The method includes receiving a direct memory access (DMA)...
US-8,656,222 Method and system for recording a selected computer process for subsequent replay
The execution behavior of a selected application is recorded for subsequent replay. During recording, only those portions of memory that are accessed by the...
US-8,656,218 Memory configuration for data replication system including identification of a subsequent log entry by a...
Performing data management operations on replicated data in a computer network. Log entries are generated for data management operations of an application...
US-8,656,190 One time settable tamper resistant software repository
A one-time-settable tamper resistant software repository may be used in any computing system to store system information such as security violations and...
US-8,656,150 Computer system with overclocking function involves setting time parameter of memory controller
An overclocking method applied to a computer system includes the following steps: setting a first operating voltage and a first clock rate; generating a first...
US-8,656,146 Computer system comprising a secure boot mechanism
A secure boot processing may be accomplished on the basis of a non-volatile memory that is an integral part of the CPU and which may not be modified once a...
US-8,656,142 Managing multiple speculative assist threads at differing cache levels
An illustrative embodiment provides a computer-implemented process for managing multiple speculative assist threads for data pre-fetching that sends a command...
US-8,656,137 Computer system with processor local coherency for virtualized input/output
A method includes selectively routing a physical address to an originating device instead of to a shared memory at controller that manages conversion of device...
US-8,656,129 Aggregate symmetric multiprocessor system
An aggregate symmetric multiprocessor (SMP) data processing system includes a first SMP computer including at least first and second processing units and a...
US-8,656,128 Aggregate data processing system having multiple overlapping synthetic computers
A first SMP computer has first and second processing units and a first system memory pool, a second SMP computer has third and fourth processing units and a...
US-8,656,120 Device, method and computer-readable medium relocating remote procedure call data in heterogeneous...
Disclosed is a device, method and computer-readable medium relocating Remote Procedure Call (RPC) data in a heterogeneous multiprocessor System-on-Chip (MPSoC)....
US-8,656,117 Read completion data management
An input/output unit for a computer system that is interfaced with a memory unit having a plurality of partitions manages completions of read requests in the...
US-8,656,114 Multi-core active memory processor system
In general, the present invention relates to data cache processing. Specifically, the present invention relates to a system that provides reconfigurable dynamic...
US-8,656,102 Method for preloading configurations of a reconfigurable heterogeneous system for information processing into a...
A method for preloading into a hierarchy of memories, bitstreams representing the configuration information for a reconfigurable processing system including...
US-8,656,101 Higher-level redundancy information computation
Higher-level redundancy information computation enables a Solid-State Disk (SSD)controller to provide higher-level redundancy capabilities to maintain reliable...
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